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  /art/compiler/optimizing/
intrinsics_x86_64.cc 95 CpuRegister src_curr_addr = locations->GetTemp(0).AsRegister<CpuRegister>();
96 CpuRegister dst_curr_addr = locations->GetTemp(1).AsRegister<CpuRegister>();
97 CpuRegister src_stop_addr = locations->GetTemp(2).AsRegister<CpuRegister>();
148 __ movd(output.AsRegister<CpuRegister>(), input.AsFpuRegister<XmmRegister>(), is64bit);
154 __ movd(output.AsFpuRegister<XmmRegister>(), input.AsRegister<CpuRegister>(), is64bit);
195 CpuRegister out = locations->Out().AsRegister<CpuRegister>();
366 CpuRegister out = locations->Out().AsRegister<CpuRegister>();
410 CpuRegister out = locations->Out().AsRegister<CpuRegister>();
683 __ cmpl(Address(input, length_offset), length.AsRegister<CpuRegister>());
697 __ cmpl(temp, length.AsRegister<CpuRegister>())
    [all...]
code_generator_x86_64.cc 209 Address array_len(array_loc.AsRegister<CpuRegister>(), len_offset);
216 __ movl(length_loc.AsRegister<CpuRegister>(), array_len);
218 __ shrl(length_loc.AsRegister<CpuRegister>(), Immediate(1));
353 __ UnpoisonHeapReference(locations->InAt(1).AsRegister<CpuRegister>());
489 CpuRegister ref_cpu_reg = ref_.AsRegister<CpuRegister>();
490 Register ref_reg = ref_cpu_reg.AsRegister();
582 CpuRegister ref_cpu_reg = ref_.AsRegister<CpuRegister>();
583 Register ref_reg = ref_cpu_reg.AsRegister();
655 bool base_equals_value = (base.AsRegister() == value.AsRegister());
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intrinsics_x86.cc 98 Register src = locations->InAt(0).AsRegister<Register>();
100 Register dest = locations->InAt(2).AsRegister<Register>();
104 Register temp1 = temp1_loc.AsRegister<Register>();
105 Register temp2 = locations->GetTemp(1).AsRegister<Register>();
106 Register temp3 = locations->GetTemp(2).AsRegister<Register>();
129 __ leal(temp2, Address(src_pos.AsRegister<Register>(), temp1, ScaleFactor::TIMES_1, 0));
152 __ leal(temp3, Address(dest_pos.AsRegister<Register>(), temp1, ScaleFactor::TIMES_1, 0));
205 __ movd(output.AsRegister<Register>(), input.AsFpuRegister<XmmRegister>());
221 __ movd(output.AsFpuRegister<XmmRegister>(), input.AsRegister<Register>());
277 Register out = locations->Out().AsRegister<Register>()
    [all...]
code_generator_x86.cc 163 Address array_len(array_loc.AsRegister<Register>(), len_offset);
170 __ movl(length_loc.AsRegister<Register>(), array_len);
172 __ shrl(length_loc.AsRegister<Register>(), Immediate(1));
337 __ UnpoisonHeapReference(locations->InAt(1).AsRegister<Register>());
478 Register ref_reg = ref_.AsRegister<Register>();
565 Register ref_reg = ref_.AsRegister<Register>();
730 Register reg_out = out_.AsRegister<Register>();
753 Register index_reg = index_.AsRegister<Register>();
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intrinsics_mips64.cc 66 GpuRegister trg_reg = trg.AsRegister<GpuRegister>();
157 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
192 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>();
230 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>();
231 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
282 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>();
283 GpuRegister out = locations->Out().AsRegister<GpuRegister>();
317 __ Dsbh(out.AsRegister<GpuRegister>(), in.AsRegister<GpuRegister>());
318 __ Dshd(out.AsRegister<GpuRegister>(), out.AsRegister<GpuRegister>())
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intrinsics_mips.cc 78 Register trg_reg = trg.AsRegister<Register>();
176 Register out = locations->Out().AsRegister<Register>();
217 Register in = locations->InAt(0).AsRegister<Register>();
262 Register in = locations->InAt(0).AsRegister<Register>();
263 Register out = locations->Out().AsRegister<Register>();
276 Register in = locations->InAt(0).AsRegister<Register>();
277 Register out = locations->Out().AsRegister<Register>();
450 Register out = locations->Out().AsRegister<Register>();
466 Register in = locations->InAt(0).AsRegister<Register>();
498 Register out = locations->Out().AsRegister<Register>()
    [all...]
code_generator_mips64.cc 497 GpuRegister ref_reg = ref_.AsRegister<GpuRegister>();
537 DCHECK_EQ(entrypoint_.AsRegister<GpuRegister>(), T9);
538 __ Jalr(entrypoint_.AsRegister<GpuRegister>());
592 GpuRegister ref_reg = ref_.AsRegister<GpuRegister>();
659 GpuRegister offset = field_offset_.AsRegister<GpuRegister>();
751 GpuRegister reg_out = out_.AsRegister<GpuRegister>();
774 GpuRegister index_reg = index_.AsRegister<GpuRegister>();
    [all...]
code_generator_mips.cc 540 Register ref_reg = ref_.AsRegister<Register>();
580 DCHECK_EQ(entrypoint_.AsRegister<Register>(), T9);
581 __ Jalr(entrypoint_.AsRegister<Register>());
636 Register ref_reg = ref_.AsRegister<Register>();
804 Register reg_out = out_.AsRegister<Register>();
    [all...]
code_generator_vector_x86_64.cc 72 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ false);
80 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ false);
86 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ false);
91 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ true);
147 __ movd(locations->Out().AsRegister<CpuRegister>(), src, /*64-bit*/ false);
151 __ movd(locations->Out().AsRegister<CpuRegister>(), src, /*64-bit*/ true);
    [all...]
code_generator_vector_mips64.cc 63 __ FillB(dst, locations->InAt(0).AsRegister<GpuRegister>());
68 __ FillH(dst, locations->InAt(0).AsRegister<GpuRegister>());
72 __ FillW(dst, locations->InAt(0).AsRegister<GpuRegister>());
76 __ FillD(dst, locations->InAt(0).AsRegister<GpuRegister>());
126 __ Copy_sW(locations->Out().AsRegister<GpuRegister>(), src, 0);
130 __ Copy_sD(locations->Out().AsRegister<GpuRegister>(), src, 0);
    [all...]
code_generator_vector_x86.cc 77 __ movd(dst, locations->InAt(0).AsRegister<Register>());
85 __ movd(dst, locations->InAt(0).AsRegister<Register>());
91 __ movd(dst, locations->InAt(0).AsRegister<Register>());
160 __ movd(locations->Out().AsRegister<Register>(), src);
    [all...]
code_generator_vector_mips.cc 58 __ FillB(dst, locations->InAt(0).AsRegister<Register>());
63 __ FillH(dst, locations->InAt(0).AsRegister<Register>());
67 __ FillW(dst, locations->InAt(0).AsRegister<Register>());
127 __ Copy_sW(locations->Out().AsRegister<Register>(), src, 0);
    [all...]
locations.h 181 T AsRegister() const {
  /art/compiler/utils/x86_64/
managed_register_x86_64.cc 63 Register low = AsRegisterPairLow().AsRegister();
64 Register high = AsRegisterPairHigh().AsRegister();
101 os << "CPU: " << static_cast<int>(AsCpuRegister().AsRegister());
constants_x86_64.h 35 constexpr Register AsRegister() const {
assembler_x86_64.cc 28 return os << reg.AsRegister();
42 if (addr.rm() != RSP || addr.cpu_index().AsRegister() == RSP) {
51 if (addr.rm() != RSP || addr.cpu_index().AsRegister() == RSP) {
57 if (addr.rm() != RSP || addr.cpu_index().AsRegister() == RSP) {
125 int inverted_reg = 15 - static_cast<int>(vvvv.AsRegister());
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assembler_x86_64.h 197 CHECK_EQ(base_in.AsRegister(), RSP);
228 CHECK_NE(index_in.AsRegister(), RSP); // Illegal addressing mode.
235 CHECK_NE(index_in.AsRegister(), RSP); // Illegal addressing mode.
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jni_macro_assembler_x86_64.cc 52 cfi().RelOffset(DWARFReg(spill.AsCpuRegister().AsRegister()), 0);
129 cfi().Restore(DWARFReg(spill.AsCpuRegister().AsRegister()));
assembler_x86_64_test.cc 126 return a.AsRegister() < b.AsRegister();
517 if (index->AsRegister() == x86_64::RSP) {
520 } else if (base->AsRegister() == index->AsRegister()) {
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  /external/v8/src/compiler/
instruction-selector-impl.h 197 location.AsRegister());
378 int reg_id = primary_location.AsRegister();
403 location.AsRegister(), virtual_register);
406 location.AsRegister(), virtual_register);
linkage.h 130 int32_t AsRegister() const {
linkage.cc 479 return loc.IsRegister() && loc.AsRegister() == reg.code() &&
  /art/compiler/jni/quick/x86_64/
calling_convention_x86_64.cc 61 result |= (1 << r.AsX86_64().AsCpuRegister().AsRegister());
  /external/v8/src/wasm/baseline/
liftoff-assembler.cc 475 LiftoffRegister instance_reg(Register::from_code(instance_loc.AsRegister()));
507 LiftoffRegister reg = LiftoffRegister::from_code(rc, loc.AsRegister());
568 rc, call_descriptor->GetReturnLocation(0).AsRegister());
572 rc, call_descriptor->GetReturnLocation(1).AsRegister());
liftoff-compiler.cc 239 int reg_code = param_loc.AsRegister();
266 int reg_code = param_loc.AsRegister();
321 Register instance_reg = Register::from_code(instance_loc.AsRegister());
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