| /external/mesa3d/src/intel/compiler/ |
| brw_vec4_generator.cpp | 67 brw_set_default_access_mode(p, BRW_ALIGN_1);
230 brw_set_default_access_mode(p, BRW_ALIGN_1);
305 brw_set_default_access_mode(p, BRW_ALIGN_1);
392 brw_set_default_access_mode(p, BRW_ALIGN_1);
439 brw_set_default_access_mode(p, BRW_ALIGN_1);
481 brw_set_default_access_mode(p, BRW_ALIGN_1);
540 brw_set_default_access_mode(p, BRW_ALIGN_1);
552 brw_set_default_access_mode(p, BRW_ALIGN_1);
570 brw_set_default_access_mode(p, BRW_ALIGN_1);
634 brw_set_default_access_mode(p, BRW_ALIGN_1);
[all...] |
| brw_eu_emit.c | 105 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
128 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
213 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
221 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
228 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
312 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
318 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
730 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
[all...] |
| brw_clip_util.c | 96 brw_set_default_access_mode(p, BRW_ALIGN_1);
211 brw_set_default_access_mode(p, BRW_ALIGN_1);
232 brw_set_default_access_mode(p, BRW_ALIGN_1);
|
| brw_disasm.c | 708 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) {
759 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
1029 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
[all...] |
| test_eu_compact.cpp | 297 brw_set_default_access_mode(p, BRW_ALIGN_1);
|
| brw_eu_validate.c | 469 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1 &&
[all...] |
| brw_eu_defines.h | 88 #define BRW_ALIGN_1 0
[all...] |
| brw_clip_unfilled.c | 86 brw_set_default_access_mode(p, BRW_ALIGN_1);
|
| brw_compile_sf.c | 663 brw_set_default_access_mode(p, BRW_ALIGN_1);
|
| brw_fs_generator.cpp | [all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_ff_gs_emit.c | 451 brw_set_default_access_mode(p, BRW_ALIGN_1);
|
