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    Searched refs:B_PCH_SPI_PR1_PRB_MASK (Results 1 - 2 of 2) sorted by null

  /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/
PchRegsSpi.h 69 #define B_PCH_SPI_PR1_PRB_MASK 0x00001FFF // Protected Range Base Mask, [12:0] here represents base limit of address [24:12]
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformDxe/
Platform.c 491 (B_PCH_SPI_PR1_PRB_MASK&(BiosFlaLower1>>12))|(B_PCH_SPI_PR1_PRL_MASK&(BiosFlaLimit1>>12)<<16));
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