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    Searched refs:CCM_PLL5_DIV1_SHIFT (Results 1 - 2 of 2) sorted by null

  /external/u-boot/arch/arm/mach-sunxi/
clock_sun8i_a83t.c 117 div1 << CCM_PLL5_DIV1_SHIFT, &ccm->pll5_cfg);
  /external/u-boot/arch/arm/include/asm/arch-sunxi/
clock_sun8i_a83t.h 169 #define CCM_PLL5_DIV1_SHIFT 16

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