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Searched
refs:CLK_DDR
(Results
1 - 15
of
15
) sorted by null
/external/u-boot/arch/arm/include/asm/arch-rockchip/
clock.h
28
CLK_DDR
,
/external/u-boot/drivers/clk/rockchip/
clk_rv1108.c
45
case
CLK_DDR
:
120
pll_rate = rkclk_pll_get_rate(cru,
CLK_DDR
);
201
unsigned int dpll = rkclk_pll_get_rate(cru,
CLK_DDR
);
clk_rk3188.c
152
rkclk_set_pll(cru,
CLK_DDR
, &dpll_cfg[cfg], has_bwadj);
506
case
CLK_DDR
:
clk_rk322x.c
340
rkclk_set_pll(cru,
CLK_DDR
, &dpll_cfg);
384
case
CLK_DDR
:
clk_rk3288.c
207
rkclk_set_pll(cru,
CLK_DDR
, &dpll_cfg[cfg]);
755
case
CLK_DDR
:
clk_rk3328.c
219
case
CLK_DDR
:
clk_rk3368.c
495
case
CLK_DDR
:
/external/u-boot/drivers/ddr/marvell/axp/
ddr3_axp_vars.h
167
u8 div_ratio1to1[CLK_VCO][
CLK_DDR
] =
196
u8 div_ratio2to1[CLK_VCO][
CLK_DDR
] =
ddr3_axp.h
444
#define
CLK_DDR
12
ddr3_dfs.c
40
extern u8 div_ratio[CLK_VCO][
CLK_DDR
];
44
extern u8 div_ratio1to1[CLK_CPU][
CLK_DDR
];
45
extern u8 div_ratio2to1[CLK_CPU][
CLK_DDR
];
[
all
...]
/external/u-boot/arch/arm/mach-rockchip/
rk3288-board.c
262
{ "dpll",
CLK_DDR
},
/external/u-boot/drivers/ram/rockchip/
dmc-rk3368.c
939
priv->ddr_clk.id =
CLK_DDR
;
sdram_rk3188.c
906
priv->ddr_clk.id =
CLK_DDR
;
sdram_rk322x.c
802
priv->ddr_clk.id =
CLK_DDR
;
sdram_rk3288.c
1071
priv->ddr_clk.id =
CLK_DDR
;
Completed in 771 milliseconds