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Searched refs:CLK_DIV_CORE1_VAL (Results 1 -
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Completed in 142 milliseconds
| /external/u-boot/arch/arm/mach-exynos/ | |
| exynos5_setup.h | 136 #define CLK_DIV_CORE1_VAL 0x07070700 |
| clock_init_exynos5.c | 674 writel(CLK_DIV_CORE1_VAL, &clk->div_core1); |
Completed in 142 milliseconds
