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Searched refs:CLK_DIV_DISP1_0_FIMD1 (Results 1 -
2 of 2) sorted by null
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| /external/u-boot/arch/arm/mach-exynos/ | |
| exynos5_setup.h | 234 #define CLK_DIV_DISP1_0_FIMD1 (2 << 0) |
| clock_init_exynos5.c | 986 setbits_le32(&clk->div_disp1_0, CLK_DIV_DISP1_0_FIMD1); |
Completed in 48 milliseconds
