HomeSort by relevance Sort by last modified time
    Searched refs:CLK_DIV_PERIC1_VAL (Results 1 - 2 of 2) sorted by null

  /external/u-boot/arch/arm/mach-exynos/
exynos5_setup.h 673 #define CLK_DIV_PERIC1_VAL ((SPI1_SUB_RATIO << 24) \
851 #define CLK_DIV_PERIC1_VAL ((SPI2_RATIO << 28) \
clock_init_exynos5.c 762 writel(CLK_DIV_PERIC1_VAL, &clk->div_peric1);
953 writel(CLK_DIV_PERIC1_VAL, &clk->div_peric1);

Completed in 115 milliseconds