HomeSort by relevance Sort by last modified time
    Searched refs:CLK_DIV_PERIC3_VAL (Results 1 - 2 of 2) sorted by null

  /external/u-boot/arch/arm/mach-exynos/
exynos5_setup.h 686 #define CLK_DIV_PERIC3_VAL (PWM_RATIO << 0)
865 #define CLK_DIV_PERIC3_VAL ((AUDIO2_RATIO << 28) \
clock_init_exynos5.c 764 writel(CLK_DIV_PERIC3_VAL, &clk->div_peric3);
955 writel(CLK_DIV_PERIC3_VAL, &clk->div_peric3);

Completed in 300 milliseconds