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    Searched refs:CLK_SRC_DISP1_0_VAL (Results 1 - 2 of 2) sorted by null

  /external/u-boot/arch/arm/mach-exynos/
exynos5_setup.h 693 #define CLK_SRC_DISP1_0_VAL 0x6
878 #define CLK_SRC_DISP1_0_VAL 0x10666600
clock_init_exynos5.c 773 writel(CLK_SRC_DISP1_0_VAL, &clk->src_disp1_0);
932 writel(CLK_SRC_DISP1_0_VAL, &clk->src_disp10);

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