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    Searched refs:CLK_SRC_TOP1_VAL (Results 1 - 4 of 4) sorted by null

  /external/u-boot/arch/arm/mach-exynos/
clock_init_exynos4.c 49 writel(CLK_SRC_TOP1_VAL, &clk->src_top1);
exynos5_setup.h 551 #define CLK_SRC_TOP1_VAL ((MUX_ACLK_400_G3D_SEL << 28) \
784 #define CLK_SRC_TOP1_VAL 0x00100200
exynos4_setup.h 138 #define CLK_SRC_TOP1_VAL (VPLLSRC_SEL_FINPLL)
clock_init_exynos5.c 691 writel(CLK_SRC_TOP1_VAL, &clk->src_top1);
915 writel(CLK_SRC_TOP1_VAL, &clk->src_top1);

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