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  /external/u-boot/arch/arm/mach-exynos/
exynos5_setup.h 582 #define CLK_SRC_TOP3_VAL ((MUX_ACLK_333_SUB_SEL << 24) \
786 #define CLK_SRC_TOP3_VAL 0x11111111
clock_init_exynos5.c 693 writel(CLK_SRC_TOP3_VAL, &clk->src_top3);
927 writel(CLK_SRC_TOP3_VAL, &clk->src_top3);

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