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Searched
refs:CONFIG_SYS_DDR_TIMING_1_1333
(Results
1 - 3
of
3
) sorted by null
/external/u-boot/board/freescale/bsc9132qds/
ddr.c
50
.timing_cfg_1 =
CONFIG_SYS_DDR_TIMING_1_1333
,
spl_minimal.c
50
__raw_writel(
CONFIG_SYS_DDR_TIMING_1_1333
, &ddr->timing_cfg_1);
/external/u-boot/include/configs/
BSC9132QDS.h
163
#define
CONFIG_SYS_DDR_TIMING_1_1333
0x98913A45
Completed in 539 milliseconds