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    Searched refs:CONFIG_SYS_DDR_TIMING_3_1333 (Results 1 - 3 of 3) sorted by null

  /external/u-boot/board/freescale/bsc9132qds/
ddr.c 48 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_1333,
spl_minimal.c 48 __raw_writel(CONFIG_SYS_DDR_TIMING_3_1333, &ddr->timing_cfg_3);
  /external/u-boot/include/configs/
BSC9132QDS.h 161 #define CONFIG_SYS_DDR_TIMING_3_1333 0x01061000

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