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    Searched refs:CONFIG_SYS_DDR_TIMING_5_1333 (Results 1 - 2 of 2) sorted by null

  /external/u-boot/board/freescale/bsc9132qds/
spl_minimal.c 59 __raw_writel(CONFIG_SYS_DDR_TIMING_5_1333, &ddr->timing_cfg_5);
  /external/u-boot/include/configs/
BSC9132QDS.h 149 #define CONFIG_SYS_DDR_TIMING_5_1333 0x03401400
185 #define CONFIG_SYS_DDR_TIMING_5 CONFIG_SYS_DDR_TIMING_5_1333

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