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    Searched refs:CRX_PHY_REG (Results 1 - 8 of 8) sorted by null

/external/u-boot/drivers/ddr/marvell/a38x/
ddr3_training_bist.c	503 ddr3_tip_read_adll_value(0, rd_ctrl_adll, CRX_PHY_REG(cs), MASK_ALL_BITS); 597 subphy, DDR_PHY_DATA, CRX_PHY_REG(cs),
mv_ddr_regs.h	406 #define CRX_PHY_REG(cs) (CRX_PHY_BASE + (cs) * 0x4)
ddr3_training_pbs.c	70 CRX_PHY_REG(effective_cs) : 851 CRX_PHY_REG(effective_cs) :
ddr3_training_ip_engine.c	477 reg_data = CRX_PHY_REG(effective_cs);     [all...]
ddr3_training_centralization.c	97 reg_phy_off = CRX_PHY_REG(effective_cs);
ddr3_debug.c	633 CRX_PHY_REG(csindex),     [all...]
ddr3_training_leveling.c	452 CRX_PHY_REG(0), 689 CRX_PHY_REG(0),     [all...]
ddr3_training.c	[all...]

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