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    Searched refs:CSITE_CPU_DBG1_LAR (Results 1 - 4 of 4) sorted by null

  /external/u-boot/arch/arm/include/asm/arch-tegra/
ap.h 31 #define CSITE_CPU_DBG1_LAR (NV_PA_CSITE_BASE + 0x12FB0)
  /external/u-boot/arch/arm/mach-tegra/
cpu.h 41 #define CSITE_CPU_DBG1_LAR (NV_PA_CSITE_BASE + 0x12FB0)
cpu.c 398 writel(rst, CSITE_CPU_DBG1_LAR);
  /external/u-boot/arch/arm/mach-tegra/tegra20/
warmboot_avp.c 135 writel(reg, CSITE_CPU_DBG1_LAR);

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