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Searched refs:CTX_PHY_REG (Results 1 - 8 of 8) sorted by null

/external/u-boot/drivers/ddr/marvell/a38x/
ddr3_training_bist.c	`502 ddr3_tip_read_adll_value(0, wr_ctrl_adll, CTX_PHY_REG(cs), MASK_ALL_BITS); 545 DDR_PHY_DATA, CTX_PHY_REG(cs), adll_tap); 575 subphy, DDR_PHY_DATA, CTX_PHY_REG(cs),`
ddr3_debug.c	`627 CTX_PHY_REG(csindex), [all...]`
mv_ddr_regs.h	`396 #define CTX_PHY_REG(cs) (CTX_PHY_BASE + (cs) * 0x4)`
ddr3_training_leveling.c	`[all...]`
ddr3_training_pbs.c	`71 CTX_PHY_REG(effective_cs); 852 CTX_PHY_REG(effective_cs);`
ddr3_training_ip_engine.c	`473 reg_data = CTX_PHY_REG(effective_cs); [all...]`
ddr3_training_centralization.c	`93 reg_phy_off = CTX_PHY_REG(effective_cs);`
ddr3_training.c	`[all...]`

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