| /device/linaro/bootloader/edk2/OvmfPkg/Library/SmmCpuFeaturesLib/ |
| SmmCpuFeaturesLib.c | 143 QEMU_SMRAM_SAVE_STATE_MAP *CpuSaveState = (QEMU_SMRAM_SAVE_STATE_MAP *)CpuState;
145 if ((CpuSaveState->x86.SMMRevId & 0xFFFF) == 0) {
146 OriginalInstructionPointer = (UINT64)CpuSaveState->x86._EIP;
147 CpuSaveState->x86._EIP = (UINT32)NewInstructionPointer;
152 if ((CpuSaveState->x86.AutoHALTRestart & BIT0) != 0) {
153 CpuSaveState->x86.AutoHALTRestart &= ~BIT0;
156 OriginalInstructionPointer = CpuSaveState->x64._RIP;
157 if ((CpuSaveState->x64.IA32_EFER & LMA) == 0) {
158 CpuSaveState->x64._RIP = (UINT32)NewInstructionPointer32;
160 CpuSaveState->x64._RIP = (UINT32)NewInstructionPointer;
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Framework/Protocol/SmmCpuState/ |
| SmmCpuState.h | 28 #include "CpuSaveState.h"
40 EFI_SMM_CPU_STATE **CpuSaveState;
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Compatibility/SmmBaseHelper/ |
| SmmBaseHelper.c | 167 mFrameworkSmst->CpuSaveState[CpuIndex].
184 State = (EFI_SMM_CPU_STATE *)gSmst->CpuSaveState[CpuIndex];
188 SaveState = &mFrameworkSmst->CpuSaveState[CpuIndex].Ia32SaveState;
219 to write from mFrameworkSmst->CpuSaveState[CpuIndex].
235 State = (EFI_SMM_CPU_STATE *)gSmst->CpuSaveState[CpuIndex];
240 SaveState = &mFrameworkSmst->CpuSaveState[CpuIndex].Ia32SaveState;
270 The first Framework CpuSaveStates (for CPU 0) is from mFrameworkSmst->CpuSaveState which is
284 UINTN FirstSSIndex; // Index of first CpuSaveState in the page
285 UINTN LastSSIndex; // Index of last CpuSaveState in the page
286 BOOLEAN FirstSSAligned; // Whether first CpuSaveState is page-aligned
[all...] |
| /device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/ |
| SmramSaveState.c | 282 SMRAM_SAVE_STATE_MAP *CpuSaveState;
288 CpuSaveState = gSmst->CpuSaveState[CpuIndex];
308 ASSERT(CpuSaveState != NULL);
309 CopyMem(Buffer, (UINT8 *)CpuSaveState + mSmmCpuWidthOffset[RegisterIndex].Offset32, Width);
328 CopyMem(Buffer, (UINT8 *)CpuSaveState + mSmmCpuWidthOffset[RegisterIndex].Offset64Lo, MIN(4, Width));
333 CopyMem((UINT8 *)Buffer + 4, (UINT8 *)CpuSaveState + mSmmCpuWidthOffset[RegisterIndex].Offset64Hi, Width - 4);
478 SMRAM_SAVE_STATE_MAP *CpuSaveState;
502 CpuSaveState = gSmst->CpuSaveState[CpuIndex];
[all...] |
| MpService.c | 1027 SMRAM_SAVE_STATE_MAP *CpuSaveState;
1031 CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmmCpuPrivate->CpuSaveState[CpuIndex];
1033 AsmWriteDr6 (CpuSaveState->x86._DR6);
1034 AsmWriteDr7 (CpuSaveState->x86._DR7);
1036 AsmWriteDr6 ((UINTN)CpuSaveState->x64._DR6);
1037 AsmWriteDr7 ((UINTN)CpuSaveState->x64._DR7);
1057 SMRAM_SAVE_STATE_MAP *CpuSaveState;
1061 CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmmCpuPrivate->CpuSaveState[CpuIndex];
[all...] |
| PiSmmCpuDxeSmm.c | 27 NULL, // Pointer to CpuSaveState array
34 NULL // SmmCoreEntryContext.CpuSaveState
772 gSmmCpuPrivate->CpuSaveState = (VOID **)AllocatePool (sizeof (VOID *) * mMaxNumberOfCpus);
773 ASSERT (gSmmCpuPrivate->CpuSaveState != NULL);
776 mSmmCpuPrivateData.SmmCoreEntryContext.CpuSaveState = gSmmCpuPrivate->CpuSaveState;
795 gSmmCpuPrivate->CpuSaveState[Index] = (VOID *)(mCpuHotPlugData.SmBase[Index] + SMRAM_SAVE_STATE_MAP_OFFSET);
807 gSmmCpuPrivate->CpuSaveState[Index],
[all...] |
| CpuS3.c | 582 gSmst->CpuSaveState = gSmmCpuPrivate->SmmCoreEntryContext.CpuSaveState;
|
| PiSmmCpuDxeSmm.h | 167 VOID **CpuSaveState;
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Include/Pi/ |
| PiSmmCis.h | 228 /// corresponding save state specified by CpuSaveState. There are always
237 VOID **CpuSaveState;
308 /// corresponding save state specified by CpuSaveState. There are always
317 VOID **CpuSaveState;
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Smm/SmmScriptLib/ |
| PiSmmDefinition.h | 286 /// corresponding save state specified by CpuSaveState. There are always
295 VOID **CpuSaveState;
366 /// corresponding save state specified by CpuSaveState. There are always
375 VOID **CpuSaveState;
|
| /device/linaro/bootloader/edk2/IntelFrameworkPkg/Include/Protocol/ |
| SmmCpuSaveState.h | 170 EFI_SMM_CPU_STATE **CpuSaveState;
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Core/PiSmmCore/ |
| PiSmmCore.c | 52 NULL, // CpuSaveState
447 gSmmCoreSmst.CpuSaveState = SmmEntryContext->CpuSaveState;
|
| /device/linaro/bootloader/edk2/IntelFrameworkPkg/Include/Framework/ |
| SmmCis.h | 519 /// index into the CpuSaveState and CpuOptionalFloatingPointState
532 EFI_SMM_CPU_SAVE_STATE *CpuSaveState;
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCommunication/ |
| PiSmmCommunicationPei.c | 95 UINT64 CpuSaveState;
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Library/SmmLockBoxLib/ |
| SmmLockBoxPeiLib.c | 61 UINT64 CpuSaveState;
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/ |
| SmmStm.c | 419 Psd = (TXT_PROCESSOR_SMM_DESCRIPTOR *)((UINTN)gSmst->CpuSaveState[Index] - SMRAM_SAVE_STATE_MAP_OFFSET + TXT_SMM_PSD_OFFSET);
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Framework/Protocol/SmmBase/ |
| SmmBase.h | 499 EFI_SMM_CPU_SAVE_STATE *CpuSaveState;
|
