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    Searched refs:DMC_MEMCONTROL_MRR_BYTE_7_0 (Results 1 - 2 of 2) sorted by null

/external/u-boot/arch/arm/mach-exynos/
clock_init_exynos5.c	242 DMC_MEMCONTROL_MRR_BYTE_7_0, 345 DMC_MEMCONTROL_MRR_BYTE_7_0, 448 DMC_MEMCONTROL_MRR_BYTE_7_0,
exynos5_setup.h	47 #define DMC_MEMCONTROL_MRR_BYTE_7_0 (0 << 25)

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