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    Searched refs:DP83848_CTL_REG (Results 1 - 2 of 2) sorted by null

  /external/u-boot/arch/arm/mach-davinci/
dp83848.c 86 if (!davinci_eth_phy_read(phy_addr, DP83848_CTL_REG, &tmp))
92 davinci_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp);
104 if (!davinci_eth_phy_read(phy_addr, DP83848_CTL_REG, &tmp))
108 davinci_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp);
112 davinci_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp);
  /external/u-boot/include/
dp83848.h 12 #define DP83848_CTL_REG 0x0 /* Basic Mode Control Reg */
23 /*--Bit definitions: DP83848_CTL_REG */

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