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    Searched refs:ESDCTL_DDR2_EMR3 (Results 1 - 3 of 3) sorted by null

  /external/u-boot/board/freescale/mx35pdk/
mx35pdk.h 34 #define ESDCTL_DDR2_EMR3 0x06000000
lowlevel_init.S 185 ldr r4, =ESDCTL_DDR2_EMR3
  /external/u-boot/arch/arm/cpu/arm1136/mx35/
mx35_sdram.c 13 #define ESDCTL_DDR2_EMR3 0x06000000
90 writeb(0xda, start_address + ESDCTL_DDR2_EMR3); /* EMRS3 */

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