/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
ISDOpcodes.h | 447 // FLOG, FLOG2, FLOG10, FEXP, FEXP2, 451 FLOG, FLOG2, FLOG10, FEXP, FEXP2, [all...] |
/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 521 /// FLOG, FLOG2, FLOG10, FEXP, FEXP2, 525 FLOG, FLOG2, FLOG10, FEXP, FEXP2, [all...] |
BasicTTIImpl.h | 754 ISDs.push_back(ISD::FEXP2); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 554 /// FLOG, FLOG2, FLOG10, FEXP, FEXP2, 558 FLOG, FLOG2, FLOG10, FEXP, FEXP2, [all...] |
BasicTTIImpl.h | [all...] |
TargetLowering.h | 808 case ISD::STRICT_FEXP2: EqOpc = ISD::FEXP2; break [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
LegalizeVectorOps.cpp | 183 case ISD::FEXP2:
|
LegalizeFloatTypes.cpp | 73 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break; [all...] |
LegalizeVectorTypes.cpp | 75 case ISD::FEXP2: 451 case ISD::FEXP2: [all...] |
TargetLowering.cpp | 584 setOperationAction(ISD::FEXP2, MVT::f64, Expand); 589 setOperationAction(ISD::FEXP2, MVT::f32, Expand); [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 169 case ISD::FEXP2: return "fexp2";
|
LegalizeVectorOps.cpp | 317 case ISD::FEXP2: [all...] |
LegalizeFloatTypes.cpp | 85 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break; [all...] |
LegalizeVectorTypes.cpp | 81 case ISD::FEXP2: 639 case ISD::FEXP2: [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 198 case ISD::FEXP2: return "fexp2"; [all...] |
LegalizeFloatTypes.cpp | 85 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break; [all...] |
LegalizeVectorOps.cpp | 376 case ISD::FEXP2: [all...] |
LegalizeVectorTypes.cpp | 84 case ISD::FEXP2: 695 case ISD::FEXP2: [all...] |
/external/v8/src/mips/ |
constants-mips.h | 921 FEXP2 = ((7U << 22) + 27), [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
MipsSEISelLowering.cpp | 153 setOperationAction(ISD::FEXP2, MVT::f16, Promote); 384 setOperationAction(ISD::FEXP2, Ty, Legal); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | 673 setOperationAction(ISD::FEXP2, VT, Expand); [all...] |
/external/v8/src/mips64/ |
constants-mips64.h | 955 FEXP2 = ((7U << 22) + 27), [all...] |
/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | [all...] |
/external/llvm/lib/Target/AMDGPU/ |
AMDGPUISelLowering.cpp | 239 setOperationAction(ISD::FEXP2, MVT::f32, Legal); 414 setOperationAction(ISD::FEXP2, VT, Expand); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsSEISelLowering.cpp | 313 setOperationAction(ISD::FEXP2, Ty, Legal); [all...] |