/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 527 /// FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two 532 FMINNUM, FMAXNUM, 533 /// FMINNAN/FMAXNAN - Behave identically to FMINNUM/FMAXNUM, except that [all...] |
BasicTTIImpl.h | 774 ISDs.push_back(ISD::FMAXNUM); [all...] |
SelectionDAG.h | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 560 /// FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two 565 FMINNUM, FMAXNUM, 566 /// FMINNAN/FMAXNAN - Behave identically to FMINNUM/FMAXNUM, except that [all...] |
BasicTTIImpl.h | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCCTRLoops.cpp | 309 case Intrinsic::maxnum: Opcode = ISD::FMAXNUM; break; 376 Opcode = ISD::FMAXNUM; break;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
PPCCTRLoops.cpp | 335 case Intrinsic::maxnum: Opcode = ISD::FMAXNUM; break; 404 Opcode = ISD::FMAXNUM; break;
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/external/llvm/lib/Target/AMDGPU/ |
SIISelLowering.cpp | 206 setOperationAction(ISD::FMAXNUM, MVT::f64, Legal); 224 setTargetDAGCombine(ISD::FMAXNUM); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
SIISelLowering.cpp | 379 setOperationAction(ISD::FMAXNUM, MVT::f64, Legal); 468 setOperationAction(ISD::FMAXNUM, MVT::f16, Legal); 570 setOperationAction(ISD::FMAXNUM, MVT::v2f16, Legal); 591 setOperationAction(ISD::FMAXNUM, MVT::v4f16, Custom); 625 setTargetDAGCombine(ISD::FMAXNUM); [all...] |
AMDGPUISelLowering.cpp | 314 setOperationAction(ISD::FMAXNUM, MVT::f32, Legal); 447 setOperationAction(ISD::FMAXNUM, VT, Expand); 552 case ISD::FMAXNUM: [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 154 case ISD::FMAXNUM: return "fmaxnum";
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LegalizeVectorOps.cpp | 304 case ISD::FMAXNUM: [all...] |
LegalizeFloatTypes.cpp | 78 case ISD::FMAXNUM: R = SoftenFloatRes_FMAXNUM(N); break; [all...] |
LegalizeVectorTypes.cpp | 111 case ISD::FMAXNUM: 676 case ISD::FMAXNUM: [all...] |
SelectionDAGBuilder.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 177 case ISD::FMAXNUM: return "fmaxnum"; [all...] |
LegalizeFloatTypes.cpp | 78 case ISD::FMAXNUM: R = SoftenFloatRes_FMAXNUM(N); break; [all...] |
LegalizeVectorOps.cpp | 363 case ISD::FMAXNUM: [all...] |
LegalizeVectorTypes.cpp | 115 case ISD::FMAXNUM: 733 case ISD::FMAXNUM: [all...] |
SelectionDAGBuilder.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
RISCVISelLowering.cpp | 116 setOperationAction(ISD::FMAXNUM, MVT::f32, Legal); 126 setOperationAction(ISD::FMAXNUM, MVT::f64, Legal); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 293 setOperationAction(ISD::FMAXNUM, MVT::f16, Promote); 385 setOperationAction(ISD::FMAXNUM, Ty, Legal); 705 ISD::FMINNUM, ISD::FMAXNUM}) [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | 601 setOperationAction(ISD::FMAXNUM, VT, Expand); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 454 setOperationAction(ISD::FMAXNUM, MVT::f64, Legal); 459 setOperationAction(ISD::FMAXNUM, MVT::v2f64, Legal); 464 setOperationAction(ISD::FMAXNUM, MVT::f32, Legal); 469 setOperationAction(ISD::FMAXNUM, MVT::v4f32, Legal); 474 setOperationAction(ISD::FMAXNUM, MVT::f128, Legal); [all...] |