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    Searched refs:IDC_ENABLE (Results 1 - 4 of 4) sorted by null

  /external/u-boot/arch/powerpc/cpu/mpc8xx/
cache.c 22 mtspr(IC_CST, IDC_ENABLE);
40 mtspr(DC_CST, IDC_ENABLE);
cpu.c 131 wr_ic_cst(IDC_ENABLE);
169 wr_dc_cst(IDC_ENABLE);
start.S 108 lis r3, IDC_ENABLE@h /* Enable instruction cache */
  /external/u-boot/arch/powerpc/include/asm/
cache.h 88 #define IDC_ENABLE 0x02000000 /* Cache enable */

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