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    Searched refs:IDC_ENABLED (Results 1 - 3 of 3) sorted by null

  /external/u-boot/arch/powerpc/cpu/mpc8xx/
cache.c 15 return !!(mfspr(IC_CST) & IDC_ENABLED);
33 return !!(mfspr(IC_CST) & IDC_ENABLED);
cpu.c 107 u32 cacheon = rd_ic_cst() & IDC_ENABLED;
148 u32 cacheon = rd_dc_cst() & IDC_ENABLED;
  /external/u-boot/arch/powerpc/include/asm/
cache.h 103 #define IDC_ENABLED 0x80000000 /* Cache is enabled */

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