| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| ISDOpcodes.h | 272 /// INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector
278 INSERT_SUBVECTOR,
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 288 /// INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector
294 INSERT_SUBVECTOR,
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 323 /// INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector
329 INSERT_SUBVECTOR,
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86IntrinsicsInfo.h | [all...] |
| X86ISelLowering.cpp | 662 setOperationAction(ISD::INSERT_SUBVECTOR, VT,Expand);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 694 setOperationAction(ISD::INSERT_SUBVECTOR, VT,Expand);
[all...] |
| X86ISelDAGToDAG.cpp | 619 if (Root->getOpcode() == ISD::INSERT_SUBVECTOR &&
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| HexagonISelLoweringHVX.cpp | 98 setOperationAction(ISD::INSERT_SUBVECTOR, T, Custom);
189 setOperationAction(ISD::INSERT_SUBVECTOR, BoolV, Custom);
[all...] |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 221 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
|
| LegalizeVectorTypes.cpp | 598 case ISD::INSERT_SUBVECTOR: SplitVecRes_INSERT_SUBVECTOR(N, Lo, Hi); break;
869 Lo = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, LoVT, Lo, SubVec, Idx);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 262 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
[all...] |
| LegalizeVectorTypes.cpp | 655 case ISD::INSERT_SUBVECTOR: SplitVecRes_INSERT_SUBVECTOR(N, Lo, Hi); break;
[all...] |
| DAGCombiner.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| TargetLowering.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86ISelLowering.cpp | 144 Result = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec,
703 setOperationAction(ISD::INSERT_SUBVECTOR,(MVT::SimpleValueType)VT,Expand);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| AArch64GenDAGISel.inc | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIISelLowering.cpp | 148 case ISD::INSERT_SUBVECTOR:
[all...] |
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| X86GenDAGISel.inc | [all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| SelectionDAG.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| SIISelLowering.cpp | 252 case ISD::INSERT_SUBVECTOR:
486 case ISD::INSERT_SUBVECTOR:
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | 425 if (SV.getOpcode() != ISD::INSERT_SUBVECTOR)
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | 475 if (SV.getOpcode() != ISD::INSERT_SUBVECTOR)
[all...] |
