/external/arm-neon-tests/ |
InitCache.s | 24 MCR p15, 0, r0, c1, c0, 0 ; write CP15 register 1 36 MCR p15, 0, r0, c1, c0, 1 ; Write Auxiliary Control Register 45 MCR p15, 0, r0, c1, c0, 0 ; write CP15 register 1
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/external/u-boot/arch/sh/include/asm/ |
cpu_sh7706.h | 28 #define MCR 0xffffff68
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cpu_sh7750.h | 55 #define MCR 0xFF800014
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/device/linaro/bootloader/edk2/QuarkPlatformPkg/Acpi/AcpiTables/Dsdt/ |
PciHostBridge.asi | 116 MCR, 32, // Message Control Register
128 Store(Local0, MCR)
141 Store(Local0, MCR)
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/device/linaro/bootloader/edk2/MdePkg/Library/BaseCpuLib/Arm/ |
CpuSleep.S | 7 # MCR p15,0,r0,c7,c0,4 ;Wait for Interrupt instruction
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CpuFlushTlb.asm | 34 MCR p15,0,r0,c8,c5,0 ;Invalidate all the unlocked entried in TLB
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CpuSleep.asm | 7 ; MCR p15,0,r0,c7,c0,4 ;Wait for Interrupt instruction
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
ARMGenRegisterInfo.inc | [all...] |
/external/u-boot/arch/arm/mach-omap2/ |
lowlevel_init.S | 44 MCR p15, 4, R0, c1, c0, 0
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/external/u-boot/board/ms7750se/ |
lowlevel_init.S | 136 MCR_A: .long MCR
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/external/u-boot/board/renesas/r2dplus/ |
lowlevel_init.S | 107 MCR_A: .long MCR /* MCR Address */
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/external/u-boot/include/ |
ppc_asm.tmpl | 115 #define MCR 0x00000168
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/external/u-boot/arch/arm/cpu/armv7/ |
start.S | 73 mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTLR Register 78 mcr p15, 0, r0, c12, c0, 0 @Set VBAR 101 mcr p15, 0, r0, c7, c5, 0 @ invalidate icache 102 mcr p15, 0, r0, c7, c10, 4 @ DSB 103 mcr p15, 0, r0, c7, c5, 4 @ ISB 143 mov r0, #0 @ set up for MCR 144 mcr p15, 0, r0, c8, c7, 0 @ invalidate TLBs 145 mcr p15, 0, r0, c7, c5, 0 @ invalidate icache 146 mcr p15, 0, r0, c7, c5, 6 @ invalidate BP array 147 mcr p15, 0, r0, c7, c10, 4 @ DS [all...] |
/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
diagnostics.s | 78 @ Out of range immediate for MCR/MCR2/MCRR/MCRR2 79 mcr p7, #8, r5, c1, c1, #4 80 mcr p7, #2, r5, c1, c1, #8
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basic-arm-instructions.s | [all...] |
basic-thumb2-instructions.s | [all...] |
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
AArch64GenRegisterInfo.inc | [all...] |
/external/llvm/test/MC/ARM/ |
diagnostics.s | 140 @ Out of range immediate for MCR/MCR2/MCRR/MCRR2 141 mcr p7, #8, r5, c1, c1, #4 142 mcr p7, #2, r5, c1, c1, #8 156 mcr p10, #2, r5, c1, c1, #4
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basic-arm-instructions.s | [all...] |
basic-thumb2-instructions.s | [all...] |
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
X86GenRegisterInfo.inc | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
diagnostics.s | 156 @ Out of range immediate for MCR/MCR2/MCRR/MCRR2 157 mcr p7, #8, r5, c1, c1, #4 158 mcr p7, #2, r5, c1, c1, #8 174 mcr p10, #2, r5, c1, c1, #4 [all...] |
basic-arm-instructions.s | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelDAGToDAG.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
ARMISelDAGToDAG.cpp | [all...] |