| /external/v8/src/compiler/mips64/ |
| instruction-scheduler-mips64.cc | 450 MFHI = 1,
514 latency = Latency::MULT + Latency::MFHI;
527 latency = Latency::MULTU + Latency::MFHI;
540 latency = Latency::DMULT + Latency::MFHI;
595 latency = Latency::DIV + Latency::MFHI;
608 latency = Latency::DIVU + Latency::MFHI;
621 latency = Latency::DDIV + Latency::MFHI;
634 latency = Latency::DDIV + Latency::MFHI;
[all...] |
| /external/v8/src/compiler/mips/ |
| instruction-scheduler-mips.cc | 419 MFHI = 1,
968 return Latency::MULT + Latency::MFHI;
974 return 1 + Latency::MULT + Latency::MFHI;
984 return Latency::MULTU + Latency::MFHI;
990 return 1 + Latency::MULTU + Latency::MFHI;
1004 return Latency::DIV + Latency::MFHI;
1010 return 1 + Latency::DIV + Latency::MFHI;
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsISelDAGToDAG.cpp | 257 SDNode *Hi = CurDAG->getMachineNode(Mips::MFHI, dl, MVT::i32, InFlag);
294 return CurDAG->getMachineNode(Mips::MFHI, dl, MVT::i32, InFlag);
|
| MipsInstrInfo.cpp | 116 Opc = Mips::MFHI, SrcReg = 0;
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEInstrInfo.cpp | 97 Opc = isMicroMips ? Mips::MFHI16_MM : Mips::MFHI;
232 BuildMI(MBB, I, DL, get(Mips::MFHI), Mips::K0);
346 Opc = isMicroMips ? Mips::MFHI16_MM : Mips::MFHI;
|
| MipsISelLowering.h | 77 MFHI,
|
| MipsSEFrameLowering.cpp | 207 // mfhi $vr1, src
239 // mfhi $vr1, src
800 Op = (Reg == Mips::HI0) ? Mips::MFHI : Mips::MFLO;
[all...] |
| MipsSEISelLowering.cpp | 449 SDValue HiOut = CurDAG->getNode(MipsISD::MFHI, DL, MVT::i32, MAdd);
521 SDValue HiOut = CurDAG->getNode(MipsISD::MFHI, DL, MVT::i32, MSub);
[all...] |
| MipsFastISel.cpp | [all...] |
| MipsISelLowering.cpp | 127 case MipsISD::MFHI: return "MipsISD::MFHI";
493 // insert MFHI
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| MipsSEInstrInfo.cpp | 102 Opc = isMicroMips ? Mips::MFHI16_MM : Mips::MFHI;
305 BuildMI(MBB, I, DL, get(Mips::MFHI), Mips::K0);
424 Opc = isMicroMips ? Mips::MFHI16_MM : Mips::MFHI;
[all...] |
| MipsISelLowering.h | 128 MFHI,
|
| MipsSEFrameLowering.cpp | 227 // mfhi $vr1, src
259 // mfhi $vr1, src
823 Op = (Reg == Mips::HI0) ? Mips::MFHI : Mips::MFLO;
[all...] |
| MipsFastISel.cpp | [all...] |
| MipsISelLowering.cpp | 208 case MipsISD::MFHI: return "MipsISD::MFHI";
589 // insert MFHI
[all...] |
| MipsSEISelLowering.cpp | [all...] |
| /external/v8/src/mips/ |
| constants-mips.h | 515 MFHI = ((2U << 3) + 0),
[all...] |
| assembler-mips.cc | 2458 void Assembler::mfhi(Register rd) { function in class:v8::internal::Assembler
[all...] |
| /external/pcre/dist2/src/sljit/ |
| sljitNativeMIPS_common.c | 159 #define MFHI (HI(0) | LO(16))
[all...] |
| sljitNativeMIPS_32.c | 379 FAIL_IF(push_inst(compiler, MFHI | DA(EQUAL_FLAG), EQUAL_FLAG));
|
| sljitNativeMIPS_64.c | 473 FAIL_IF(push_inst(compiler, MFHI | DA(EQUAL_FLAG), EQUAL_FLAG));
|
| /external/v8/src/mips64/ |
| constants-mips64.h | 497 MFHI = ((2U << 3) + 0),
[all...] |
| assembler-mips64.cc | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| MipsGenInstrInfo.inc | [all...] |
