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    Searched refs:MTRR_VAR_PHYBASE (Results 1 - 3 of 3) sorted by null

/external/u-boot/arch/x86/cpu/quark/
quark.c	48 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYBASE(MTRR_VAR_ROM), 56 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYBASE(MTRR_VAR_ESRAM),
dram.c	146 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYBASE(MTRR_VAR_RAM),
/external/u-boot/arch/x86/include/asm/arch-quark/
quark.h	69 #define MTRR_VAR_PHYBASE(n) (0x5a + 2 * (n))

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