HomeSort by relevance Sort by last modified time
    Searched refs:MUX_BPLL_SEL_MASK (Results 1 - 2 of 2) sorted by null

  /external/u-boot/arch/arm/mach-exynos/
clock_init_exynos5.c 578 clrbits_le32(&clk->src_cdrex, MUX_BPLL_SEL_MASK);
581 } while ((val | MUX_BPLL_SEL_MASK) != val);
exynos5_setup.h 154 #define MUX_BPLL_SEL_MASK (1 << 0)

Completed in 111 milliseconds