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    Searched refs:MUX_CPLL_SEL_MASK (Results 1 - 2 of 2) sorted by null

  /external/u-boot/arch/arm/mach-exynos/
clock_init_exynos5.c 568 clrbits_le32(&clk->src_top2, MUX_CPLL_SEL_MASK);
572 tmp = MUX_CPLL_SEL_MASK | MUX_EPLL_SEL_MASK | MUX_VPLL_SEL_MASK
exynos5_setup.h 150 #define MUX_CPLL_SEL_MASK (1 << 8)

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