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    Searched refs:MUX_MPLL_SEL_MASK (Results 1 - 2 of 2) sorted by null

  /external/u-boot/arch/arm/mach-exynos/
clock_init_exynos5.c 563 clrbits_le32(&clk->src_core1, MUX_MPLL_SEL_MASK);
566 } while ((val | MUX_MPLL_SEL_MASK) != val);
exynos5_setup.h 148 #define MUX_MPLL_SEL_MASK (1 << 8)

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