/device/linaro/bootloader/edk2/OvmfPkg/Library/PciHostBridgeLib/ |
PciHostBridge.h | 45 @param[in] MemAbove4G MMIO aperture above 4G.
71 IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
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PciHostBridgeLib.c | 100 @param[in] MemAbove4G MMIO aperture above 4G.
126 IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
151 CopyMem (&RootBus->MemAbove4G, MemAbove4G, sizeof (*MemAbove4G));
218 PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
235 MemAbove4G.Base = PcdGet64 (PcdPciMmio64Base);
236 MemAbove4G.Limit = PcdGet64 (PcdPciMmio64Base) +
239 CopyMem (&MemAbove4G, &mNonExistAperture, sizeof (mNonExistAperture));
314 &MemAbove4G,
[all...] |
XenSupport.c | 69 IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
155 MemAperture = MemAbove4G;
189 PCI_ROOT_BRIDGE_APERTURE Io, Mem, MemAbove4G, PMem, PMemAbove4G, *MemAperture;
205 Io.Base = Mem.Base = MemAbove4G.Base = PMem.Base = PMemAbove4G.Base = MAX_UINT64;
206 Io.Limit = Mem.Limit = MemAbove4G.Limit = PMem.Limit = PMemAbove4G.Limit = 0;
371 &Mem, &MemAbove4G,
444 &Io, &Mem, &MemAbove4G, &PMem, &PMemAbove4G,
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/device/linaro/bootloader/edk2/CorebootPayloadPkg/Library/PciHostBridgeLib/ |
PciHostBridge.h | 54 @param[in] MemAbove4G MMIO aperture above 4G.
80 IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
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PciHostBridgeLib.c | 82 @param[in] MemAbove4G MMIO aperture above 4G.
108 IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
133 CopyMem (&RootBus->MemAbove4G, MemAbove4G, sizeof (*MemAbove4G));
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PciHostBridgeSupport.c | 34 @param[in] MemAbove4G MMIO aperture above 4G.
44 IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
68 if (MemAbove4G->Base < 0x100000000ULL) {
69 if (MemAbove4G->Base < Mem->Base) {
70 Mem->Base = MemAbove4G->Base;
72 if (MemAbove4G->Limit > Mem->Limit) {
73 Mem->Limit = MemAbove4G->Limit;
75 MemAbove4G->Base = MAX_UINT64;
76 MemAbove4G->Limit = 0;
167 @param[in] MemAbove4G MMIO aperture above 4G. [all...] |
/device/linaro/bootloader/edk2/MdeModulePkg/Include/Library/ |
PciHostBridgeLib.h | 50 PCI_ROOT_BRIDGE_APERTURE MemAbove4G; ///< MMIO aperture above 4GB which can be used by the root bridge.
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/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/ |
PciRootBridgeIo.c | 90 DEBUG ((EFI_D_INFO, " MemAbove4G: %lx - %lx\n", Bridge->MemAbove4G.Base, Bridge->MemAbove4G.Limit));
95 // Make sure Mem and MemAbove4G apertures are valid
103 if (Bridge->MemAbove4G.Base <= Bridge->MemAbove4G.Limit) {
104 ASSERT (Bridge->MemAbove4G.Base >= SIZE_4GB);
105 if (Bridge->MemAbove4G.Base < SIZE_4GB) {
146 ASSERT (Bridge->MemAbove4G.Base > Bridge->MemAbove4G.Limit); [all...] |
PciRootBridge.h | 72 PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
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PciHostBridge.c | 414 MemApertures[1] = &RootBridges[Index].MemAbove4G;
803 ALIGN_VALUE (RootBridge->MemAbove4G.Base, Alignment + 1),
804 RootBridge->MemAbove4G.Limit
[all...] |
/device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/ |
AmdStyxPciHostBridgeLib.c | 103 RootBridge->MemAbove4G.Base = PcdGet64 (PcdPciMmio64Base);
104 RootBridge->MemAbove4G.Limit = PcdGet64 (PcdPciMmio64Base) + PcdGet64 (PcdPciMmio64Size) - 1;
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/device/linaro/bootloader/edk2/ArmVirtPkg/Library/FdtPciHostBridgeLib/ |
FdtPciHostBridgeLib.c | 334 mRootBridge.MemAbove4G.Base = Mmio64Base;
335 mRootBridge.MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
346 mRootBridge.MemAbove4G.Base = MAX_UINT64;
347 mRootBridge.MemAbove4G.Limit = 0;
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