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Searched
refs:NextOp
(Results
1 - 6
of
6
) sorted by null
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
MLxExpansionPass.cpp
217
unsigned
NextOp
= HasLane ? 5 : 4;
218
ARMCC::CondCodes Pred = (ARMCC::CondCodes)MI->getOperand(
NextOp
).getImm();
219
unsigned PredReg = MI->getOperand(++
NextOp
).getReg();
/external/llvm/lib/Target/ARM/
MLxExpansionPass.cpp
283
unsigned
NextOp
= HasLane ? 5 : 4;
284
ARMCC::CondCodes Pred = (ARMCC::CondCodes)MI->getOperand(
NextOp
).getImm();
285
unsigned PredReg = MI->getOperand(++
NextOp
).getReg();
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
MLxExpansionPass.cpp
283
unsigned
NextOp
= HasLane ? 5 : 4;
284
ARMCC::CondCodes Pred = (ARMCC::CondCodes)MI->getOperand(
NextOp
).getImm();
285
unsigned PredReg = MI->getOperand(++
NextOp
).getReg();
/external/swiftshader/third_party/LLVM/lib/CodeGen/
MachineInstr.cpp
88
MachineOperand *
NextOp
= Contents.Reg.Next;
89
*Contents.Reg.Prev =
NextOp
;
90
if (
NextOp
) {
91
assert(
NextOp
->getReg() == getReg() && "Corrupt reg use/def chain!");
92
NextOp
->Contents.Reg.Prev = Contents.Reg.Prev;
[
all
...]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DAGCombiner.cpp
[
all
...]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp
[
all
...]
Completed in 290 milliseconds