/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
nv50_ir_target_gm107.cpp | 237 case OP_CVT: 242 if (insn->op == OP_CVT && (insn->def(0).getFile() == FILE_PREDICATE || 292 case OP_CVT:
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nv50_ir_lowering_nv50.cpp | 499 bld.mkCvt(OP_CVT, TYPE_F32, af, ty, div->getSrc(0)); 500 bld.mkCvt(OP_CVT, TYPE_F32, bf, ty, div->getSrc(1)); 518 bld.mkCvt(OP_CVT, ty, (q0 = bld.getSSA()), TYPE_F32, qf)->rnd = ROUND_Z; 525 bld.mkCvt(OP_CVT, TYPE_F32, (aR = bld.getSSA()), TYPE_U32, aRf); 528 bld.mkCvt(OP_CVT, TYPE_U32, (qR = bld.getSSA()), TYPE_F32, qRf) 779 bld.mkCvt(OP_CVT, TYPE_U32, src, TYPE_F32, layer); 872 bld.mkCvt(OP_CVT, TYPE_U8, flags, TYPE_U32, cond->getDef(0))->flagsDef = 0; 1024 bld.mkCvt(OP_CVT, TYPE_F32, i->getDef(def), TYPE_S32, i->getDef(def)); [all...] |
nv50_ir_target_nvc0.cpp | 113 { OP_CVT, 0x1, 0x1, 0x0, 0x8, 0x1, 0x0 }, 438 case OP_CVT: 488 if (insn->op == OP_CVT) 573 case OP_CVT: 603 case OP_CVT:
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nv50_ir_target_nv50.cpp | 93 { OP_CVT, 0x1, 0x1, 0x0, 0x8, 0x0, 0x1, 0x1, 0x0 }, 459 case OP_CVT: 502 if (insn->op == OP_CVT)
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nv50_ir_from_tgsi.cpp | [all...] |
nv50_ir_lowering_nvc0.cpp | 914 bld.mkCvt(OP_CVT, TYPE_U16, layer, sTy, src)->saturate = sat; 982 bld.mkCvt(OP_CVT, TYPE_U16, src, sTy, arrayIndex)->saturate = sat; [all...] |
nv50_ir_peephole.cpp | 514 return OP_CVT; 1006 if (i->op != OP_CVT) 1040 if (i->op != OP_CVT) 1081 if (i->op != OP_CVT) [all...] |
nv50_ir.h | 75 OP_CVT, [all...] |
nv50_ir_emit_gm107.cpp | [all...] |
nv50_ir_emit_nvc0.cpp | [all...] |
nv50_ir_ra.cpp | [all...] |
nv50_ir_emit_gk110.cpp | [all...] |
nv50_ir_emit_nv50.cpp | [all...] |