| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| nv50_ir_target_gm107.cpp | 165 if ((insn->op == OP_MUL || insn->op == OP_MAD) &&
210 case OP_MAD:
|
| nv50_ir_target_nvc0.cpp | 107 { OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 }, // special c[] constraint
108 { OP_FMA, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 }, // keep the same as OP_MAD
494 return (insn->op == OP_ADD) || (insn->op == OP_MAD);
570 case OP_MAD:
602 case OP_MAD:
|
| nv50_ir_peephole.cpp | 529 case OP_MAD:
706 case OP_MAD:
757 case OP_MAD:
908 case OP_MAD:
1033 case OP_MAD:
[all...] |
| nv50_ir_lowering_nv50.cpp | 102 i[3] = bld->mkOp3(OP_MAD, fTy, t[1], a[1], b[0], t[0]);
110 i[4] = bld->mkOp3(OP_MAD, fTy, t[3], a[0], b[0], t[2]);
126 i[5] = bld->mkOp3(OP_MAD, fTy, r[4], a[1], b[1], r[2]);
463 if (mul->op == OP_MAD) {
600 case OP_MAD:
[all...] |
| nv50_ir_target_nv50.cpp | 90 { OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x1, 0x1, 0x0 }, // special constraint
341 if ((i->op == OP_MUL || i->op == OP_MAD) && !isFloatType(i->dType)) {
|
| nv50_ir_lowering_gm107.cpp | 249 bld.mkOp3(OP_MAD , TYPE_U32, tmp0, tmp0, tmp1, tmp2);
|
| nv50_ir.h | 57 OP_MAD,
[all...] |
| nv50_ir_from_tgsi.cpp | [all...] |
| nv50_ir_emit_nvc0.cpp | [all...] |
| nv50_ir_emit_gk110.cpp | [all...] |
| nv50_ir_emit_nv50.cpp | [all...] |
| nv50_ir_emit_gm107.cpp | [all...] |
| nv50_ir_ra.cpp | [all...] |
