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    Searched refs:PAD_RETENTION_DRAM_COREBLK_VAL (Results 1 - 2 of 2) sorted by null

  /external/u-boot/arch/arm/mach-exynos/
exynos5_setup.h 705 #define PAD_RETENTION_DRAM_COREBLK_VAL 0x10000000
dmc_init_ddr3.c 668 writel(PAD_RETENTION_DRAM_COREBLK_VAL,

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