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    Searched refs:PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE (Results 1 - 8 of 8) sorted by null

  /external/mesa3d/src/mesa/drivers/dri/i965/
brw_pipe_control.h 49 #define PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE (1 << 10) /* GM45+ only */
69 PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | \
brw_program.c 291 bits |= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
295 bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
299 bits |= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
303 bits |= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
327 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
brw_pipe_control.c 557 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
gen7_l3_state.c 107 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
brw_misc_state.c 469 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
736 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
intel_tex.c 318 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
brw_blorp.c 437 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
447 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
    [all...]
intel_fbo.c     [all...]

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