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    Searched refs:PLAT_MAX_PWR_LVL (Results 1 - 25 of 38) sorted by null

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  /device/linaro/bootloader/arm-trusted-firmware/lib/psci/
psci_setup.c 86 unsigned int nodes_idx[PLAT_MAX_PWR_LVL] = {0};
87 unsigned int temp_index[PLAT_MAX_PWR_LVL], cpu_idx;
91 PLAT_MAX_PWR_LVL,
93 for (j = PLAT_MAX_PWR_LVL - 1; j >= 0; j--) {
114 int level = PLAT_MAX_PWR_LVL;
214 psci_set_pwr_domains_to_run(PLAT_MAX_PWR_LVL);
psci_common.c 28 * PLAT_MAX_PWR_LVL. It does not store the requested local power state for power
42 psci_req_local_pwr_states[PLAT_MAX_PWR_LVL][PLATFORM_CORE_COUNT];
71 CASSERT(PLAT_MAX_PWR_LVL <= PSCI_MAX_PWR_LVL && \
72 PLAT_MAX_PWR_LVL >= PSCI_CPU_PWR_LVL, \
179 * earlier. PLAT_MAX_PWR_LVL will be the highest power level a
184 pwrlvl = PLAT_MAX_PWR_LVL;
300 for (; lvl <= PLAT_MAX_PWR_LVL; lvl++)
404 assert(end_pwrlvl <= PLAT_MAX_PWR_LVL);
525 for (i = PLAT_MAX_PWR_LVL; i >= PSCI_CPU_PWR_LVL; i--) {
541 for (i = PLAT_MAX_PWR_LVL; i >= PSCI_CPU_PWR_LVL; i--)
    [all...]
psci_main.c 170 assert(psci_find_target_suspend_lvl(&state_info) == PLAT_MAX_PWR_LVL);
173 assert(is_local_state_off(state_info.pwr_domain_state[PLAT_MAX_PWR_LVL]));
181 PLAT_MAX_PWR_LVL,
191 unsigned int target_pwrlvl = PLAT_MAX_PWR_LVL;
289 /* Validate power_level against PLAT_MAX_PWR_LVL */
290 if (power_level > PLAT_MAX_PWR_LVL)
psci_off.c 24 for (lvl = PSCI_CPU_PWR_LVL; lvl <= PLAT_MAX_PWR_LVL; lvl++)
  /device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/
arm_pm.c 42 if (pwr_lvl > PLAT_MAX_PWR_LVL)
150 assert(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL2);
173 assert(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL2);
  /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/
plat_psci_handlers.c 52 for (uint32_t i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++)
56 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] =
128 write_actlr_el1(target_state->pwr_domain_state[PLAT_MAX_PWR_LVL]);
  /device/linaro/bootloader/arm-trusted-firmware/include/plat/arm/css/common/
css_pm.h 21 ((PLAT_MAX_PWR_LVL == CSS_SYSTEM_PWR_DMN_LVL) ?\
  /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/include/
platform_def.h 26 #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/common/
plat_pm.c 23 ((state)->pwr_domain_state[PLAT_MAX_PWR_LVL])
138 if (pwr_lvl > PLAT_MAX_PWR_LVL)
157 for (i = (pwr_lvl + 1); i <= PLAT_MAX_PWR_LVL; i++)
173 for (i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++)
228 for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) {
264 for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) {
285 for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) {
329 for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) {
  /device/linaro/bootloader/arm-trusted-firmware/services/spd/tlkd/
tlkd_pm.c 48 if ((cpu != 0) || (suspend_level != PLAT_MAX_PWR_LVL))
81 if ((cpu != 0) || (suspend_level != PLAT_MAX_PWR_LVL))
  /device/linaro/bootloader/arm-trusted-firmware/plat/arm/css/common/
css_pm.c 38 #if PLAT_MAX_PWR_LVL > ARM_PWR_LVL1
51 CASSERT(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL1,
55 * Ensure that the PLAT_MAX_PWR_LVL is not greater than CSS_SYSTEM_PWR_DMN_LVL
58 CASSERT(PLAT_MAX_PWR_LVL <= CSS_SYSTEM_PWR_DMN_LVL,
241 assert(PLAT_MAX_PWR_LVL == CSS_SYSTEM_PWR_DMN_LVL);
243 for (i = ARM_PWR_LVL0; i <= PLAT_MAX_PWR_LVL; i++)
  /device/linaro/bootloader/arm-trusted-firmware/plat/xilinx/zynqmp/
plat_psci.c 93 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
111 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
134 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
162 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
181 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
194 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
212 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
  /device/linaro/bootloader/arm-trusted-firmware/include/lib/psci/
psci_compat.h 18 #define PLAT_MAX_PWR_LVL PLATFORM_MAX_AFFLVL
  /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/
tegra_pm.c 116 for (uint32_t i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++)
171 if (target_state->pwr_domain_state[PLAT_MAX_PWR_LVL] ==
186 uint8_t pwr_state = target_state->pwr_domain_state[PLAT_MAX_PWR_LVL];
231 if (target_state->pwr_domain_state[PLAT_MAX_PWR_LVL] ==
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/include/
platform_def.h 54 #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2
  /device/linaro/bootloader/arm-trusted-firmware/plat/socionext/uniphier/include/
platform_def.h 25 #define PLAT_MAX_PWR_LVL 1
  /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t210/
plat_psci_handlers.c 63 for (uint32_t i = MPIDR_AFFLVL0; i < PLAT_MAX_PWR_LVL; i++)
66 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] =
165 if (target_state->pwr_domain_state[PLAT_MAX_PWR_LVL] ==
  /device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt8173/
plat_pm.c 37 #define MTK_SYSTEM_PWR_STATE(state) ((PLAT_MAX_PWR_LVL > MTK_PWR_LVL1) ?\
58 #if PLAT_MAX_PWR_LVL > MTK_PWR_LVL1
559 if ((PLAT_MAX_PWR_LVL > MTK_PWR_LVL1) &&
568 if ((PLAT_MAX_PWR_LVL > MTK_PWR_LVL1) &&
656 assert(PLAT_MAX_PWR_LVL >= 2);
658 for (int i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++)
704 if (pwr_lvl > PLAT_MAX_PWR_LVL)
774 assert(PLAT_MAX_PWR_LVL >= MTK_PWR_LVL2);
  /device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/include/
platform_def.h 25 #define PLAT_MAX_PWR_LVL ARM_PWR_LVL2
  /device/linaro/bootloader/arm-trusted-firmware/plat/arm/css/drivers/scp/
css_pm_scmi.c 119 for (lvl = ARM_PWR_LVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) {
163 for (; lvl <= PLAT_MAX_PWR_LVL; lvl++) {
195 for (; lvl <= PLAT_MAX_PWR_LVL; lvl++)
225 if ((power_level > PLAT_MAX_PWR_LVL) ||
  /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/include/
platform_def.h 30 #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2
  /device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt8173/include/
platform_def.h 40 #define PLAT_MAX_PWR_LVL 2
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/include/
platform_def.h 53 #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/include/
platform_def.h 55 #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2
  /device/linaro/bootloader/arm-trusted-firmware/plat/xilinx/zynqmp/include/
platform_def.h 24 #define PLAT_MAX_PWR_LVL 1

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