| /device/linaro/bootloader/edk2/OvmfPkg/Library/PciHostBridgeLib/ |
| PciHostBridge.h | 47 @param[in] PMem Prefetchable MMIO aperture.
72 IN PCI_ROOT_BRIDGE_APERTURE *PMem,
|
| XenSupport.c | 70 IN PCI_ROOT_BRIDGE_APERTURE *PMem,
133 MemAperture = PMem;
189 PCI_ROOT_BRIDGE_APERTURE Io, Mem, MemAbove4G, PMem, PMemAbove4G, *MemAperture;
205 Io.Base = Mem.Base = MemAbove4G.Base = PMem.Base = PMemAbove4G.Base = MAX_UINT64;
206 Io.Limit = Mem.Limit = MemAbove4G.Limit = PMem.Limit = PMemAbove4G.Limit = 0;
316 MemAperture = &PMem;
372 &PMem, &PMemAbove4G
444 &Io, &Mem, &MemAbove4G, &PMem, &PMemAbove4G,
|
| PciHostBridgeLib.c | 102 @param[in] PMem Prefetchable MMIO aperture.
127 IN PCI_ROOT_BRIDGE_APERTURE *PMem,
152 CopyMem (&RootBus->PMem, PMem, sizeof (*PMem));
|
| /device/linaro/bootloader/edk2/CorebootPayloadPkg/Library/PciHostBridgeLib/ |
| PciHostBridge.h | 56 @param[in] PMem Prefetchable MMIO aperture.
81 IN PCI_ROOT_BRIDGE_APERTURE *PMem,
|
| PciHostBridgeLib.c | 84 @param[in] PMem Prefetchable MMIO aperture.
109 IN PCI_ROOT_BRIDGE_APERTURE *PMem,
134 CopyMem (&RootBus->PMem, PMem, sizeof (*PMem));
|
| PciHostBridgeSupport.c | 36 @param[in] PMem Prefetchable MMIO aperture.
45 IN PCI_ROOT_BRIDGE_APERTURE *PMem,
57 if (PMem->Base < Mem->Base) {
58 Mem->Base = PMem->Base;
61 if (PMem->Limit > Mem->Limit) {
62 Mem->Limit = PMem->Limit;
65 PMem->Base = MAX_UINT64;
66 PMem->Limit = 0;
169 @param[in] PMem Prefetchable MMIO aperture.
185 IN PCI_ROOT_BRIDGE_APERTURE *PMem,
[all...] |
| /device/linaro/bootloader/edk2/MdeModulePkg/Include/Library/ |
| PciHostBridgeLib.h | 51 PCI_ROOT_BRIDGE_APERTURE PMem; ///< Prefetchable MMIO aperture below 4GB which can be used by the root bridge.
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/ |
| PciRootBridgeIo.c | 91 DEBUG ((EFI_D_INFO, " PMem: %lx - %lx\n", Bridge->PMem.Base, Bridge->PMem.Limit));
109 if (Bridge->PMem.Base <= Bridge->PMem.Limit) {
110 ASSERT (Bridge->PMem.Limit < SIZE_4GB);
111 if (Bridge->PMem.Limit >= SIZE_4GB) {
132 ASSERT (Bridge->PMem.Base > Bridge->PMem.Limit);
134 if ((Bridge->PMem.Base <= Bridge->PMem.Limit) ||
[all...] |
| PciRootBridge.h | 71 PCI_ROOT_BRIDGE_APERTURE PMem;
|
| PciHostBridge.c | 28 L"I/O", L"Mem", L"PMem", L"Mem64", L"PMem64", L"Bus"
408 // Add all the Mem/PMem aperture to GCD
409 // Mem/PMem shouldn't overlap with each other
410 // Root bridge which needs to combine MEM and PMEM should only report
415 MemApertures[2] = &RootBridges[Index].PMem;
842 ALIGN_VALUE (RootBridge->PMem.Base, Alignment + 1),
843 RootBridge->PMem.Limit
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/ |
| AmdStyxPciHostBridgeLib.c | 109 RootBridge->PMem.Base = MAX_UINT64;
110 RootBridge->PMem.Limit = 0;
|
| /device/linaro/bootloader/edk2/ArmVirtPkg/Library/FdtPciHostBridgeLib/ |
| FdtPciHostBridgeLib.c | 353 mRootBridge.PMem.Base = MAX_UINT64;
354 mRootBridge.PMem.Limit = 0;
|
