| /device/linaro/bootloader/edk2/OvmfPkg/Library/PciHostBridgeLib/ |
| PciHostBridge.h | 49 @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.
73 IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,
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| XenSupport.c | 71 IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G
153 MemAperture = PMemAbove4G;
189 PCI_ROOT_BRIDGE_APERTURE Io, Mem, MemAbove4G, PMem, PMemAbove4G, *MemAperture;
205 Io.Base = Mem.Base = MemAbove4G.Base = PMem.Base = PMemAbove4G.Base = MAX_UINT64;
206 Io.Limit = Mem.Limit = MemAbove4G.Limit = PMem.Limit = PMemAbove4G.Limit = 0;
320 MemAperture = &PMemAbove4G;
372 &PMem, &PMemAbove4G
444 &Io, &Mem, &MemAbove4G, &PMem, &PMemAbove4G,
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| PciHostBridgeLib.c | 104 @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.
128 IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,
153 CopyMem (&RootBus->PMemAbove4G, PMemAbove4G, sizeof (*PMemAbove4G));
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| /device/linaro/bootloader/edk2/CorebootPayloadPkg/Library/PciHostBridgeLib/ |
| PciHostBridgeSupport.c | 38 @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.
46 IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G
79 if (PMemAbove4G->Base < 0x100000000ULL) {
80 if (PMemAbove4G->Base < Mem->Base) {
81 Mem->Base = PMemAbove4G->Base;
83 if (PMemAbove4G->Limit > Mem->Limit) {
84 Mem->Limit = PMemAbove4G->Limit;
86 PMemAbove4G->Base = MAX_UINT64;
87 PMemAbove4G->Limit = 0;
171 @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.
[all...] |
| PciHostBridge.h | 58 @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.
82 IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,
|
| PciHostBridgeLib.c | 86 @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.
110 IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,
135 CopyMem (&RootBus->PMemAbove4G, PMemAbove4G, sizeof (*PMemAbove4G));
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| /device/linaro/bootloader/edk2/MdeModulePkg/Include/Library/ |
| PciHostBridgeLib.h | 52 PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; ///< Prefetchable MMIO aperture above 4GB which can be used by the root bridge.
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/ |
| PciRootBridgeIo.c | 92 DEBUG ((EFI_D_INFO, " PMemAbove4G: %lx - %lx\n", Bridge->PMemAbove4G.Base, Bridge->PMemAbove4G.Limit));
115 if (Bridge->PMemAbove4G.Base <= Bridge->PMemAbove4G.Limit) {
116 ASSERT (Bridge->PMemAbove4G.Base >= SIZE_4GB);
117 if (Bridge->PMemAbove4G.Base < SIZE_4GB) {
133 ASSERT (Bridge->PMemAbove4G.Base > Bridge->PMemAbove4G.Limit);
135 (Bridge->PMemAbove4G.Base <= Bridge->PMemAbove4G.Limit)
[all...] |
| PciRootBridge.h | 73 PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;
|
| PciHostBridge.c | 416 MemApertures[3] = &RootBridges[Index].PMemAbove4G;
828 ALIGN_VALUE (RootBridge->PMemAbove4G.Base, Alignment + 1),
829 RootBridge->PMemAbove4G.Limit
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Library/AmdStyxPciHostBridgeLib/ |
| AmdStyxPciHostBridgeLib.c | 111 RootBridge->PMemAbove4G.Base = MAX_UINT64;
112 RootBridge->PMemAbove4G.Limit = 0;
|
| /device/linaro/bootloader/edk2/ArmVirtPkg/Library/FdtPciHostBridgeLib/ |
| FdtPciHostBridgeLib.c | 355 mRootBridge.PMemAbove4G.Base = MAX_UINT64;
356 mRootBridge.PMemAbove4G.Limit = 0;
|
