/external/u-boot/board/siemens/draco/ |
mux.c | 67 {OFFSET(uart1_ctsn), MODE(7) | PULLUDDIS | RXACTIVE}, /* Y5 GPIO0_12*/ 68 {OFFSET(mmc0_dat1), MODE(7) | PULLUDDIS | RXACTIVE}, /* Y3 GPIO2_28*/ 69 {OFFSET(mmc0_dat2), MODE(7) | PULLUDDIS | RXACTIVE}, /* Y7 GPIO2_27*/ 71 {OFFSET(gpmc_be1n), MODE(7) | RXACTIVE | PULLUDDIS}, /* 1_28 Y1 */ 72 {OFFSET(gpmc_csn2), MODE(7) | RXACTIVE | PULLUDDIS}, /* 1_31 Y2 */ 73 {OFFSET(lcd_data15), MODE(7) | RXACTIVE | PULLUDDIS}, /* 0_11 Y3 */ 74 {OFFSET(lcd_data14), MODE(7) | RXACTIVE | PULLUDDIS}, /* 0_10 Y4 */ 75 {OFFSET(gpmc_clk), MODE(7) | RXACTIVE | PULLUDDIS}, /* 2_1 Y5 */ 76 {OFFSET(emu1), MODE(7) | RXACTIVE | PULLUDDIS}, /* 3_8 Y6 */ 77 {OFFSET(gpmc_ad15), MODE(7) | RXACTIVE | PULLUDDIS}, /* 1_15 Y7 * [all...] |
/external/u-boot/board/bosch/shc/ |
mux.c | 22 {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS)}, /* UART0_TXD */ 24 {OFFSET(uart0_rtsn), (MODE(0) | PULLUDDIS)}, /* UART0_RTS */ 29 {OFFSET(uart1_rxd), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* UART1_RXD */ 30 {OFFSET(uart1_txd), (MODE(0) | PULLUDDIS)}, /* UART1_TXD */ 32 {OFFSET(uart1_rtsn), (MODE(0) | PULLUDDIS)}, /* UART1_RTS */ 37 {OFFSET(spi0_sclk), (MODE(1) | PULLUDDIS | RXACTIVE)}, /* UART2_RXD */ 38 {OFFSET(spi0_d0), (MODE(1) | PULLUDDIS)}, /* UART2_TXD */ 57 {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUDDIS)}, /* MMC0_DAT3 */ 58 {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUDDIS)}, /* MMC0_DAT2 */ 59 {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUDDIS)}, /* MMC0_DAT1 * [all...] |
/external/u-boot/board/BuR/brxre1/ |
mux.c | 50 {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDDIS | RXACTIVE)}, 52 {OFFSET(xdma_event_intr0), (MODE(7) | PULLUDDIS | RXACTIVE)}, 54 {OFFSET(xdma_event_intr1), (MODE(7) | PULLUDDIS | RXACTIVE)}, 56 {OFFSET(rmii1_refclk), (MODE(7) | PULLUDDIS)}, 58 {OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS | RXACTIVE)}, 60 {OFFSET(gpmc_wpn), (MODE(7) | PULLUDDIS | RXACTIVE)}, 62 {OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)}, 64 {OFFSET(gpmc_csn0), (MODE(7) | PULLUDDIS)}, 66 {OFFSET(gpmc_csn3), (MODE(7) | PULLUDDIS | RXACTIVE) }, 68 {OFFSET(gpmc_advn_ale), (MODE(7) | PULLUDDIS | RXACTIVE)} [all...] |
/external/u-boot/board/BuR/brppt1/ |
mux.c | 163 {OFFSET(gpmc_csn3), (MODE(7) | PULLUDDIS | RXACTIVE) }, 165 {OFFSET(rmii1_refclk), (MODE(7) | PULLUDDIS | RXACTIVE) }, 180 {OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS) }, 182 {OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS) }, 195 {OFFSET(lcd_data0), (MODE(0) | PULLUDDIS)}, /* LCD-Data(0) */ 196 {OFFSET(lcd_data1), (MODE(0) | PULLUDDIS)}, /* LCD-Data(1) */ 197 {OFFSET(lcd_data2), (MODE(0) | PULLUDDIS)}, /* LCD-Data(2) */ 198 {OFFSET(lcd_data3), (MODE(0) | PULLUDDIS)}, /* LCD-Data(3) */ 199 {OFFSET(lcd_data4), (MODE(0) | PULLUDDIS)}, /* LCD-Data(4) */ 200 {OFFSET(lcd_data5), (MODE(0) | PULLUDDIS)}, /* LCD-Data(5) * [all...] |
/external/u-boot/board/siemens/rut/ |
mux.c | 22 {OFFSET(uart0_rxd), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* UART0_RXD */ 23 {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS)}, /* UART0_TXD */ 77 {OFFSET(ddr_vref), (MODE(0) | RXACTIVE | PULLUDDIS)}, 78 {OFFSET(ddr_vtp), (MODE(0) | RXACTIVE | PULLUDDIS)}, 91 {OFFSET(lcd_data0), (MODE(0) | PULLUDDIS)}, 92 {OFFSET(lcd_data1), (MODE(0) | PULLUDDIS)}, 93 {OFFSET(lcd_data2), (MODE(0) | PULLUDDIS)}, 94 {OFFSET(lcd_data3), (MODE(0) | PULLUDDIS)}, 95 {OFFSET(lcd_data4), (MODE(0) | PULLUDDIS)}, 96 {OFFSET(lcd_data5), (MODE(0) | PULLUDDIS)}, [all...] |
/external/u-boot/board/ti/am335x/ |
mux.c | 196 {OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */ 197 {OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */ 198 {OFFSET(gpmc_ad2), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD2 */ 199 {OFFSET(gpmc_ad3), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD3 */ 200 {OFFSET(gpmc_ad4), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD4 */ 201 {OFFSET(gpmc_ad5), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD5 */ 202 {OFFSET(gpmc_ad6), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD6 */ 203 {OFFSET(gpmc_ad7), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD7 */ 205 {OFFSET(gpmc_ad8), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD8 */ 206 {OFFSET(gpmc_ad9), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD9 * [all...] |
/external/u-boot/board/ti/am43xx/ |
mux.c | 51 {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS | PULLUP_EN | SLEWCTRL)}, 56 {OFFSET(mmc0_clk), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* MMC0_CLK */ 78 {OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */ 79 {OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */ 80 {OFFSET(gpmc_ad2), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD2 */ 81 {OFFSET(gpmc_ad3), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD3 */ 82 {OFFSET(gpmc_ad4), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD4 */ 83 {OFFSET(gpmc_ad5), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD5 */ 84 {OFFSET(gpmc_ad6), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD6 */ 85 {OFFSET(gpmc_ad7), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD7 * [all...] |
/external/u-boot/board/siemens/pxm2/ |
mux.c | 116 {OFFSET(lcd_data0), (MODE(0) | PULLUDDIS)}, /* LCD_DAT0 */ 117 {OFFSET(lcd_data1), (MODE(0) | PULLUDDIS)}, /* LCD_DAT1 */ 118 {OFFSET(lcd_data2), (MODE(0) | PULLUDDIS)}, /* LCD_DAT2 */ 119 {OFFSET(lcd_data3), (MODE(0) | PULLUDDIS)}, /* LCD_DAT3 */ 120 {OFFSET(lcd_data4), (MODE(0) | PULLUDDIS)}, /* LCD_DAT4 */ 121 {OFFSET(lcd_data5), (MODE(0) | PULLUDDIS)}, /* LCD_DAT5 */ 122 {OFFSET(lcd_data6), (MODE(0) | PULLUDDIS)}, /* LCD_DAT6 */ 123 {OFFSET(lcd_data7), (MODE(0) | PULLUDDIS)}, /* LCD_DAT7 */ 124 {OFFSET(lcd_data8), (MODE(0) | PULLUDDIS)}, /* LCD_DAT8 */ 125 {OFFSET(lcd_data9), (MODE(0) | PULLUDDIS)}, /* LCD_DAT9 * [all...] |
/external/u-boot/board/ti/ti816x/ |
evm.c | 64 { OFFSET(pincntl157), PULLDOWN_EN | PULLUDDIS | MODE(0x0) }, 66 { OFFSET(pincntl159), PULLUP_EN | PULLUDDIS | MODE(0x0) }, 67 { OFFSET(pincntl160), PULLUP_EN | PULLUDDIS | MODE(0x0) }, 68 { OFFSET(pincntl161), PULLUP_EN | PULLUDDIS | MODE(0x0) }, 69 { OFFSET(pincntl162), PULLUP_EN | PULLUDDIS | MODE(0x0) }, 70 { OFFSET(pincntl163), PULLUP_EN | PULLUDDIS | MODE(0x0) },
|
/external/u-boot/board/compulab/cm_t43/ |
mux.c | 51 {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS | PULLUP_EN | SLEWCTRL)}, 56 {OFFSET(mmc0_clk), (MODE(0) | PULLUDDIS | RXACTIVE)}, 74 {OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, 75 {OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, 76 {OFFSET(gpmc_ad2), (MODE(0) | PULLUDDIS | RXACTIVE)}, 77 {OFFSET(gpmc_ad3), (MODE(0) | PULLUDDIS | RXACTIVE)}, 78 {OFFSET(gpmc_ad4), (MODE(0) | PULLUDDIS | RXACTIVE)}, 79 {OFFSET(gpmc_ad5), (MODE(0) | PULLUDDIS | RXACTIVE)}, 80 {OFFSET(gpmc_ad6), (MODE(0) | PULLUDDIS | RXACTIVE)}, 81 {OFFSET(gpmc_ad7), (MODE(0) | PULLUDDIS | RXACTIVE)} [all...] |
/external/u-boot/board/compulab/cm_t335/ |
mux.c | 41 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDDIS | SLEWCTRL)}, 42 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDDIS | SLEWCTRL)}, 48 {OFFSET(uart0_ctsn), (MODE(3) | RXACTIVE | PULLUDDIS | SLEWCTRL)}, 50 {OFFSET(uart0_rtsn), (MODE(3) | RXACTIVE | PULLUDDIS | SLEWCTRL)}, 92 {OFFSET(emu0), (MODE(7) | PULLUDDIS)}, /* GPIO3_7 */
|
/external/u-boot/arch/arm/include/asm/arch-am33xx/ |
mux_am43xx.h | 23 #define PULLUDDIS (0x1 << 16) /* Pull up/down disable */
|
mux_am33xx.h | 31 #define PULLUDDIS (0x1 << 3) /* Pull up disabled */
|
mux_ti814x.h | 23 #define PULLUDDIS (0x1 << 16) /* Pull up disabled */
|
mux_ti816x.h | 29 #define PULLUDDIS (0x1 << 3) /* Pull up disabled */
|