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    Searched refs:PUP_DQS_WR (Results 1 - 3 of 3) sorted by null

  /external/u-boot/drivers/ddr/marvell/axp/
ddr3_hw_training.c 703 mode_config[DQS_WR_MODE] = PUP_DQS_WR;
838 } else if (reg == PUP_DQS_WR) {
ddr3_hw_training.h 152 #define PUP_DQS_WR 0x1
ddr3_dqs.c 318 adll_addr = ((is_tx == 1) ? PUP_DQS_WR : PUP_DQS_RD);
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