/device/linaro/bootloader/OpenPlatformPkg/Platforms/Marvell/Include/Protocol/ |
Mdio.h | 46 IN UINT32 PhyAddr,
55 IN UINT32 PhyAddr,
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MvPhy.h | 92 IN UINT32 PhyAddr,
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/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/Phy/MvPhyDxe/ |
MvPhyDxe.c | 67 IN UINT32 PhyAddr
73 Mdio->Read(Mdio, PhyAddr, MII_BMCR, &Reg);
75 Mdio->Write(Mdio, PhyAddr, MII_BMCR, Reg);
78 Mdio->Read(Mdio, PhyAddr, MII_BMCR, &Reg);
244 IN UINT32 PhyAddr,
257 Mdio->Read(Mdio, PhyAddr, RegNum, &Reg);
262 Mdio->Write(Mdio, PhyAddr, RegNum, Reg);
269 IN UINT32 PhyAddr,
281 Mdio->Write(Mdio, PhyAddr, 22, 0x00ff);
282 Mdio->Write(Mdio, PhyAddr, 17, 0x214B); [all...] |
MvPhyDxe.h | 177 IN UINT32 PhyAddr,
190 IN UINT32 PhyAddr,
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/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MvMdioDxe/ |
MvMdioDxe.c | 54 INTN PhyAddr,
58 if (PhyAddr > MVEBU_PHY_ADDR_MASK) {
59 DEBUG((DEBUG_ERROR, "Invalid PHY address %d\n", PhyAddr));
118 IN UINT32 PhyAddr,
127 Status = MdioCheckParam (PhyAddr, RegOff);
141 MdioReg = (PhyAddr << MVEBU_SMI_DEV_ADDR_OFFS)
171 IN UINT32 PhyAddr,
180 PhyAddr,
192 IN UINT32 PhyAddr,
199 PhyAddr,
[all...] |
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/EhciDxe/ |
EhciUrb.c | 381 EFI_PHYSICAL_ADDRESS PhyAddr;
397 PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->ShortReadStop, sizeof (EHC_QTD));
399 AlterNext = QTD_LINK (PhyAddr, FALSE);
434 PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, StatusQtd, sizeof (EHC_QTD));
435 AlterNext = QTD_LINK (PhyAddr, FALSE);
502 PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, NextQtd, sizeof (EHC_QTD));
503 Qtd->QtdHw.NextQtd = QTD_LINK (PhyAddr, FALSE);
510 PhyAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, NextQtd, sizeof (EHC_QTD));
511 Qh->QhHw.NextQtd = QTD_LINK (PhyAddr, FALSE);
560 EFI_PHYSICAL_ADDRESS PhyAddr;
[all...] |
UsbHcMem.c | 243 EFI_PHYSICAL_ADDRESS PhyAddr;
268 PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN) (Block->Buf + Offset);
269 return PhyAddr;
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EhciSched.c | 115 EFI_PHYSICAL_ADDRESS PhyAddr;
153 &PhyAddr,
168 EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, EHC_LOW_32BIT (PhyAddr));
172 EhcWriteOpReg (Ehc, EHC_CTRLDSSEG_OFFSET, EHC_HIGH_32BIT (PhyAddr));
182 EHC_HIGH_32BIT (PhyAddr)
836 EFI_PHYSICAL_ADDRESS PhyAddr;
858 Status = PciIo->Map (PciIo, MapOp, Urb->Data, &Len, &PhyAddr, &Map);
863 Urb->DataPhy = (VOID *) ((UINTN) PhyAddr);
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/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/UhciDxe/ |
UhciQueue.c | 41 EFI_PHYSICAL_ADDRESS PhyAddr;
49 &PhyAddr,
54 *MappedAddr = (UINT8 *) (UINTN) PhyAddr;
88 EFI_PHYSICAL_ADDRESS PhyAddr;
103 &PhyAddr,
111 *MappedAddr = (UINT8 *) (UINTN) PhyAddr;
121 &PhyAddr,
129 *MappedAddr = (UINT8 *) (UINTN) PhyAddr;
167 EFI_PHYSICAL_ADDRESS PhyAddr;
169 PhyAddr = UsbHcGetPciAddressForHostMem (Uhc->MemPool, Td, sizeof (UHCI_TD_HW)); [all...] |
UhciSched.c | 41 EFI_PHYSICAL_ADDRESS PhyAddr;
111 PhyAddr = UsbHcGetPciAddressForHostMem (Uhc->MemPool, Uhc->CtrlQh, sizeof (UHCI_QH_HW));
112 Uhc->SyncIntQh->QhHw.HorizonLink = QH_HLINK (PhyAddr, FALSE);
115 PhyAddr = UsbHcGetPciAddressForHostMem (Uhc->MemPool, Uhc->BulkQh, sizeof (UHCI_QH_HW));
116 Uhc->CtrlQh->QhHw.HorizonLink = QH_HLINK (PhyAddr, FALSE);
124 Uhc->BulkQh->QhHw.HorizonLink = QH_HLINK (PhyAddr, FALSE);
134 PhyAddr = UsbHcGetPciAddressForHostMem (Uhc->MemPool, Uhc->SyncIntQh, sizeof (UHCI_QH_HW));
136 Uhc->FrameBase[Index] = QH_HLINK (PhyAddr, FALSE);
257 EFI_PHYSICAL_ADDRESS PhyAddr;
333 PhyAddr = UsbHcGetPciAddressForHostMem (Uhc->MemPool, Next, sizeof (UHCI_QH_HW)); [all...] |
UsbHcMem.c | 242 EFI_PHYSICAL_ADDRESS PhyAddr;
267 PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN) (Block->Buf + Offset);
268 return PhyAddr;
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/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciPei/ |
XhciSched.c | 603 EFI_PHYSICAL_ADDRESS PhyAddr;
643 PhyAddr = (EFI_PHYSICAL_ADDRESS) (EvtTrb->TRBPtrLo | LShiftU64 ((UINT64) EvtTrb->TRBPtrHi, 32));
644 TRBPtr = (TRB_TEMPLATE *) (UINTN) UsbHcGetHostAddrForPciAddr (Xhc->MemPool, (VOID *) (UINTN) PhyAddr, sizeof (TRB_TEMPLATE));
734 PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Xhc->EventRing.EventRingDequeue, sizeof (TRB_TEMPLATE));
736 if ((XhcDequeue & (~0x0F)) != (PhyAddr & (~0x0F))) {
741 XhcPeiWriteRuntimeReg (Xhc, XHC_ERDP_OFFSET, XHC_LOW_32BIT (PhyAddr) | BIT3);
742 XhcPeiWriteRuntimeReg (Xhc, XHC_ERDP_OFFSET + 4, XHC_HIGH_32BIT (PhyAddr));
1047 EFI_PHYSICAL_ADDRESS PhyAddr;
[all...] |
UsbHcMem.c | 202 EFI_PHYSICAL_ADDRESS PhyAddr;
227 PhyAddr = (EFI_PHYSICAL_ADDRESS) (UINTN) (Block->Buf + Offset);
228 return PhyAddr;
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/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciDxe/ |
XhciSched.c | 237 EFI_PHYSICAL_ADDRESS PhyAddr;
271 Status = Xhc->PciIo->Map (Xhc->PciIo, MapOp, Urb->Data, &Len, &PhyAddr, &Map);
278 Urb->DataPhy = (VOID *) ((UINTN) PhyAddr);
866 EFI_PHYSICAL_ADDRESS PhyAddr;
885 PhyAddr = UsbHcGetPciAddrForHostAddr (Xhc->MemPool, Buf, sizeof (TRB_TEMPLATE) * TrbNum);
886 EndTrb->PtrLo = XHC_LOW_32BIT (PhyAddr);
887 EndTrb->PtrHi = XHC_HIGH_32BIT (PhyAddr);
[all...] |
UsbHcMem.c | 235 EFI_PHYSICAL_ADDRESS PhyAddr;
260 PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN) (Block->Buf + Offset);
261 return PhyAddr;
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/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/EhciPei/ |
EhciSched.c | 110 EFI_PHYSICAL_ADDRESS PhyAddr;
130 &PhyAddr
134 Ehc->PeriodFrameHost = (VOID *)(UINTN)PhyAddr;
135 Ehc->PeriodFrame = (VOID *)(UINTN)PhyAddr;
137 Ehc->High32bitAddr = EHC_HIGH_32BIT (PhyAddr);
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EhciUrb.c | 529 EFI_PHYSICAL_ADDRESS PhyAddr;
579 PhyAddr = (EFI_PHYSICAL_ADDRESS) (UINTN) Request ;
584 Urb->RequestPhy = (VOID *) ((UINTN) PhyAddr);
590 PhyAddr = (EFI_PHYSICAL_ADDRESS) (UINTN) Data ;
595 Urb->DataPhy = (VOID *) ((UINTN) PhyAddr);
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/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/NvmExpressDxe/ |
NvmExpressPassthru.c | 370 EFI_PHYSICAL_ADDRESS PhyAddr;
518 &PhyAddr,
525 Sq->Prp[0] = PhyAddr;
535 &PhyAddr,
546 Sq->Mptr = PhyAddr;
560 PhyAddr = (Sq->Prp[0] + EFI_PAGE_SIZE) & ~(EFI_PAGE_SIZE - 1);
561 Prp = NvmeCreatePrpList (PciIo, PhyAddr, EFI_SIZE_TO_PAGES(Offset + Bytes) - 1, &PrpListHost, &PrpListNo, &MapPrpList);
[all...] |
/external/u-boot/drivers/net/ |
ax88180.c | 88 OUTW (dev, (READ_PHY | (regaddr << 8) | priv->PhyAddr), MDIOCTRL); 106 OUTW (dev, (WRITE_PHY | (regaddr << 8) | priv->PhyAddr), MDIOCTRL); 259 unsigned short phyaddr; local 263 phyaddr = CONFIG_PHY_ADDR; 265 for (phyaddr = 0; phyaddr < 32; ++phyaddr) 268 priv->PhyAddr = phyaddr; 275 " (PHY Addr=0x%x)\n", priv->PhyAddr); [all...] |
ax88180.h | 35 unsigned short PhyAddr;
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/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/ |
UsbHcMem.c | 243 EFI_PHYSICAL_ADDRESS PhyAddr;
268 PhyAddr = (EFI_PHYSICAL_ADDRESS)(UINTN) (Block->Buf + Offset);
269 return PhyAddr;
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Ohci.c | [all...] |
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/ |
AhciMode.c | 711 EFI_PHYSICAL_ADDRESS PhyAddr;
745 &PhyAddr,
773 (VOID *)(UINTN)PhyAddr,
938 EFI_PHYSICAL_ADDRESS PhyAddr;
994 &PhyAddr,
1025 (VOID *)(UINTN)PhyAddr,
[all...] |
/device/linaro/bootloader/edk2/OptionRomPkg/UndiRuntimeDxe/ |
E100b.c | 267 UINT64 *PhyAddr;
269 PhyAddr = (UINT64 *) (UINTN) MappedAddr;
275 *PhyAddr = (UINT64) AdapterInfo->MemoryPtr;
277 (*AdapterInfo->Virt2Phys_30) (MemAddr, (UINT64) (UINTN) PhyAddr);
280 if (*PhyAddr > FOUR_GIGABYTE) {
291 *PhyAddr = MemAddr;
[all...] |
/device/linaro/bootloader/edk2/SecurityPkg/Tcg/Opal/OpalPasswordSmm/ |
OpalNvmeMode.c | 897 EFI_PHYSICAL_ADDRESS PhyAddr;
979 PhyAddr = (Sq->Prp[0] + EFI_PAGE_SIZE) & ~(EFI_PAGE_SIZE - 1);
980 Sq->Prp[1] = NvmeCreatePrpList (Nvme, Nvme->SqTdbl[Qid].Sqt, PhyAddr, EFI_SIZE_TO_PAGES(Offset + Bytes) - 1, &PrpListHost, &PrpListNo);
[all...] |