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    Searched refs:RDLVL_GATE_EN (Results 1 - 2 of 2) sorted by null

  /external/u-boot/arch/arm/mach-exynos/
dmc_init_ddr3.c 166 val |= RDLVL_GATE_EN;
730 setbits_le32(&phy0_ctrl->phy_con2, RDLVL_GATE_EN);
731 setbits_le32(&phy1_ctrl->phy_con2, RDLVL_GATE_EN);
exynos5_setup.h 268 #define RDLVL_GATE_EN (1 << 24)

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