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    Searched refs:REG_CPU_DIV_CLK_CTRL_0_ADDR (Results 1 - 2 of 2) sorted by null

  /external/u-boot/drivers/ddr/marvell/axp/
ddr3_dfs.c 273 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
315 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
334 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
569 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
609 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
628 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
876 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
914 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
933 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg);
    [all...]
ddr3_axp.h 350 #define REG_CPU_DIV_CLK_CTRL_0_ADDR 0x18700

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