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    Searched refs:REG_DDR3_MR2_CWL_MASK (Results 1 - 3 of 3) sorted by null

  /external/u-boot/drivers/ddr/marvell/axp/
ddr3_axp.h 278 #define REG_DDR3_MR2_CWL_MASK 0x7
ddr3_dfs.c 482 & ~(REG_DDR3_MR2_CWL_MASK << REG_DDR3_MR2_CWL_OFFS);
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ddr3_hw_training.c 144 reg &= REG_DDR3_MR2_CWL_MASK;

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