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    Searched refs:REG_DRAM_TRAINING_2_ECC_MUX_OFFS (Results 1 - 5 of 5) sorted by null

/external/u-boot/drivers/ddr/marvell/axp/
ddr3_dqs.c	159 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); 161 ecc << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); 188 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); 239 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); 241 ecc << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); 268 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS);     [all...]
ddr3_pbs.c	160 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); 162 REG_DRAM_TRAINING_2_ECC_MUX_OFFS); 286 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); 602 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); 604 REG_DRAM_TRAINING_2_ECC_MUX_OFFS); 799 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS);     [all...]
ddr3_axp.h	236 #define REG_DRAM_TRAINING_2_ECC_MUX_OFFS 1
ddr3_read_leveling.c	208 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); 210 ecc << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); 310 ~(1 << REG_DRAM_TRAINING_2_ECC_MUX_OFFS);     [all...]
ddr3_write_leveling.c	253 REG_DRAM_TRAINING_2_ECC_MUX_OFFS)); 257 REG_DRAM_TRAINING_2_ECC_MUX_OFFS); 402 REG_DRAM_TRAINING_2_ECC_MUX_OFFS));     [all...]

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