| /external/strace/linux/x86_64/ |
| arch_regs.h | 21 #define RIP 16
|
| userent.h | 17 XLAT(8*RIP),
|
| /external/scapy/scapy/layers/ |
| rip.py | 7 RIP (Routing Information Protocol).
14 class RIP(Packet):
15 name = "RIP header"
30 class RIPEntry(RIP):
31 name = "RIP entry"
42 name = "RIP authentication"
70 bind_layers( UDP, RIP, sport=520)
71 bind_layers( UDP, RIP, dport=520)
72 bind_layers( RIP, RIPEntry, )
|
| /bionic/libc/include/sys/ |
| reg.h | 72 #define RIP 16
|
| /bionic/libc/kernel/uapi/asm-x86/asm/ |
| ptrace-abi.h | 58 #define RIP 128
|
| /external/kernel-headers/original/uapi/asm-x86/asm/ |
| ptrace-abi.h | 55 #define RIP 128
|
| /external/libunwind/src/x86_64/ |
| init.h | 65 c->dwarf.loc[RIP] = REG_INIT_LOC(c, rip, RIP);
67 ret = dwarf_get (&c->dwarf, c->dwarf.loc[RIP], &c->dwarf.ip);
80 c->dwarf.ret_addr_column = RIP;
|
| Gstep.c | 32 3bdf0: ff 25 e2 49 13 00 jmpq *0x1349e2(%rip)
135 c->dwarf.loc[RIP] = DWARF_LOC (c->dwarf.cfa, 0);
199 c->dwarf.loc[RIP] = rip_loc;
202 c->dwarf.ret_addr_column = RIP;
210 if (!DWARF_IS_NULL_LOC (c->dwarf.loc[RIP]))
212 ret = dwarf_get (&c->dwarf, c->dwarf.loc[RIP], &c->dwarf.ip);
213 Debug (1, "Frame Chain [RIP=0x%Lx] = 0x%Lx\n",
214 (unsigned long long) DWARF_GET_LOC (c->dwarf.loc[RIP]),
|
| Gos-freebsd.c | 51 /* Check if RIP points at sigreturn sequence.
74 /* Check if RIP points at standard syscall sequence.
127 c->dwarf.loc[RIP] = DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_RIP, 0);
136 c->dwarf.loc[RIP] = DWARF_LOC (c->dwarf.cfa, 0);
137 ret = dwarf_get (&c->dwarf, c->dwarf.loc[RIP], &c->dwarf.ip);
138 Debug (1, "Frame Chain [RIP=0x%Lx] = 0x%Lx\n",
139 (unsigned long long) DWARF_GET_LOC (c->dwarf.loc[RIP]),
|
| unwind_i.h | 55 #define RIP 16
|
| Gregs.c | 77 c->dwarf.ip = *valp; /* also update the RIP cache */
78 loc = c->dwarf.loc[RIP];
|
| Gstash_frame.c | 80 /* Later we are going to fish out {RBP,RSP,RIP} from sigcontext via
87 assert (DWARF_GET_LOC(d->loc[RIP]) - uc == UC_MCONTEXT_GREGS_RIP);
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Core/DxeIplPeim/Ia32/ |
| IdtVectorAsm.asm | 73 ; + RIP +
|
| /external/llvm/lib/Analysis/ |
| RegionPrinter.cpp | 146 static RegionInfo *getGraph(RegionInfoPass *RIP) {
147 return &RIP->getRegionInfo();
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/ |
| RegionPrinter.cpp | 146 static RegionInfo *getGraph(RegionInfoPass *RIP) {
147 return &RIP->getRegionInfo();
|
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 51 : X86GenRegisterInfo((TT.isArch64Bit() ? X86::RIP : X86::EIP),
54 (TT.isArch64Bit() ? X86::RIP : X86::EIP)) {
181 // NOSP does not contain RIP, so no special case here.
190 // NOSP does not contain RIP, so no special case here.
442 for (MCSubRegIterator I(X86::RIP, this, /*IncludeSelf=*/true); I.isValid();
521 for (auto Reg : {X86::EFLAGS, X86::RIP, X86::EIP, X86::IP})
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 46 : X86GenRegisterInfo((TT.isArch64Bit() ? X86::RIP : X86::EIP),
49 (TT.isArch64Bit() ? X86::RIP : X86::EIP)) {
203 // NOSP does not contain RIP, so no special case here.
212 // NOSP does not contain RIP, so no special case here.
509 for (MCSubRegIterator I(X86::RIP, this, /*IncludeSelf=*/true); I.isValid();
595 for (auto Reg : {X86::EFLAGS, X86::RIP, X86::EIP, X86::IP})
|
| /external/syzkaller/pkg/report/ |
| linux_test.go | 82 "RIP: 0010:[<ffffffff8188c0e6>] [<ffffffff8188c0e6>] foo+0x101/0x185\n",
83 "RIP: 0010:[<ffffffff8188c0e6>] [<ffffffff8188c0e6>] foo+0x101/0x185 foo.c:555\n",
|
| fuchsia.go | 28 zirconRIP = regexp.MustCompile(` RIP: (0x[0-9a-f]+) `)
|
| /external/google-breakpad/src/common/android/ |
| breakpad_getcontext_unittest.cc | 137 CHECK_REG(RIP);
154 COMPILE_ASSERT_EQ(offsetof(_libc_fpstate,rip),offsetof(_fpstate,rip),
|
| /external/llvm/lib/Transforms/ObjCARC/ |
| ObjCARCOpts.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/ObjCARC/ |
| ObjCARCOpts.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
| X86MCTargetDesc.cpp | 289 ? X86::RIP // Should have dwarf #16.
327 MachineLocation CSSrc(is64Bit ? X86::RIP : X86::EIP);
342 // Win64 requires rip-rel addressing, thus we force it to PIC. Otherwise we
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ |
| ExceptionHandlerAsm.asm | 83 ; + RIP +
131 ; + RIP +
183 ;; UINT64 Rip;
302 ;; UINT64 Rip;
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86CodeEmitter.cpp | 419 // But it's probably not beneficial. If the MCE supports using RIP directly
421 // 89 05 00 00 00 00 mov %eax,0(%rip) # PC-relative
473 // Handle %rip relative addressing.
474 if (BaseReg == X86::RIP ||
475 (Is64BitMode && DispForReloc)) { // [disp32+RIP] in X86-64 mode
477 "Invalid rip-relative address");
485 // while others, unless explicit asked to use RIP, use absolute references.
489 // If no BaseReg, issue a RIP relative instruction only if the MCE can
493 if (BaseReg != 0 && BaseReg != X86::RIP)
503 // byte to emit an addr that is just 'disp32' (the non-RIP relative form)
[all...] |
